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spi: add delay margin

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occheung 2021-01-18 14:35:17 +08:00
parent bcb3eef8cd
commit 9d3d73479a
1 changed files with 2 additions and 2 deletions
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4
src/spi.rs
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@ -133,7 +133,7 @@ impl <SPI: Transfer<u8>,
// Disable chip select
cortex_m::asm::delay(10_u32);
self.nss.set_high();
cortex_m::asm::delay(4_u32);
cortex_m::asm::delay(5_u32);
Ok(buf[2])
},
// TODO: Maybe too naive?
@ -141,7 +141,7 @@ impl <SPI: Transfer<u8>,
// Disable chip select
cortex_m::asm::delay(10_u32);
self.nss.set_high();
cortex_m::asm::delay(4_u32);
cortex_m::asm::delay(5_u32);
Err(SpiPortError::TransferError)
}
}