newell
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newell pushed to master at newell/artiq-zynq 2024-11-22 02:08:23 +08:00
1f5ea41934 flake: update dependencies
7f83d56ef5 cargo fmt
1d431456f4 Fix DWARF parser treating catch blocks as unconditional
b03e380c1e flake: update dependencies
47fc53c4bf drtio_tuple -> drtio_context
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newell pushed to master at newell/artiq-zynq 2024-11-19 01:34:51 +08:00
244c7396d9 runtime: handle drtio-eem satellite disconnection
newell pushed to master at newell/artiq-zynq 2024-11-17 10:11:02 +08:00
2c633409b8 Set FCLK0 for EBAZ4205
newell commented on pull request M-Labs/artiq-zynq#337 2024-11-17 10:08:25 +08:00
Set FCLK0 for EBAZ4205

It may be best to add documentation to the manual stating that int_150 is not supported for EBAZ4205.

newell commented on pull request M-Labs/artiq-zynq#337 2024-11-17 10:06:38 +08:00
Set FCLK0 for EBAZ4205

Is the divider setting glitch-free? Otherwise this needs to happen while the RTIO core is under reset. I'm not sure if the 142MHz setting is any useful, I would just make "150MHz" unsupported.…

newell pushed to set-fclk0 at newell/artiq-zynq 2024-11-17 10:04:52 +08:00
8cf0fa01a1 Remove 150 MHz option from set_fclk0_freq
newell created pull request M-Labs/artiq-zynq#337 2024-11-17 06:52:48 +08:00
Set FCLK0 for EBAZ4205
newell created branch set-fclk0 in newell/artiq-zynq 2024-11-17 06:34:09 +08:00
newell pushed to set-fclk0 at newell/artiq-zynq 2024-11-17 06:34:09 +08:00
ea8374d686 Set FCLK0 for EBAZ4205
newell pushed to master at newell/artiq-zynq 2024-11-17 05:00:49 +08:00
9774b39fd8 flake: update zynq-rs
9054e4a7cb flake: update zynq-rs, switch to oxalica rust overlay
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newell pushed to master at newell/zynq-rs 2024-11-17 04:52:16 +08:00
12975de2e1 flake: add missing attributes on rustc (for nixpkgs-unstable compat)
8c404829ef flake: update nixpkgs
8f041b017c switch to oxalica rust overlay
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newell pushed to master at newell/zynq-rs 2024-11-16 10:56:14 +08:00
5815baf88b Reorder Status.get_link to check for higher speeds before slower.
newell pushed to master at newell/artiq-zynq 2024-11-16 10:56:05 +08:00
d79bf8d54a gateware: Add default TTLs to EBAZ4205 (#335)
75e7fc55a3 flake: update dependencies
Compare 2 commits »
newell created pull request M-Labs/zynq-rs#118 2024-11-16 05:13:25 +08:00
Reorder Status.get_link to check for higher speeds before slower.
newell pushed to reorder-status-get-link at newell/zynq-rs 2024-11-16 05:09:47 +08:00
5815baf88b Reorder Status.get_link to check for higher speeds before slower.
newell created branch reorder-status-get-link in newell/zynq-rs 2024-11-16 05:09:47 +08:00
newell created pull request M-Labs/artiq-zynq#335 2024-11-15 05:31:56 +08:00
gateware: Add default TTLs to EBAZ4205
newell pushed to ebaz4205-ttl at newell/artiq-zynq 2024-11-15 05:25:10 +08:00
3f2d111abb Make TTLs InOut in gateware
newell created branch ebaz4205-ttl in newell/artiq-zynq 2024-11-15 03:57:08 +08:00
newell pushed to ebaz4205-ttl at newell/artiq-zynq 2024-11-15 03:57:08 +08:00
265c52bc2a Add default TTLs to EBAZ4205