newell
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newell pushed to master at newell/nac3 2025-04-09 11:56:52 +08:00
b0526ba29f nac3ld: do not allocate image space for NOBITS sections
0a481ec880 nac3ld: do not copy NOBITS data to the image
65fa85815a nac3standalone test: pass struct cslice by value when intended to be a string
e4f6fbeeeb expr: remove byref/byval attribute for struct args
f5285fbf7f [artiq] Bump PyO3 to 0.24
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newell opened issue M-Labs/nac3#591 2025-02-28 09:05:15 +08:00
nac3 requires @staticmethod to pass self
newell pushed to master at newell/nac3 2025-02-26 13:40:14 +08:00
b1d5163936 fix passing keyword arguements to RPCs
01e0ce2eee [meta] Apply clippy suggestions
f0397b7e09 Implemented passing of kwargs into RPC
60a73dc1c4 nac3ld: support shortened address retrieval for memory access
683daae31e msys2: regenerate packages
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newell pushed to master at newell/artiq-zynq 2024-12-29 11:06:27 +08:00
a0281e4989 cargo fmt
850e783139 bump rustfmt
8fd8cae9d5 update dependencies
7acf8af7f7 flake add outputHashes
13264d9992 update cargo lockfile
Compare 19 commits »
newell pushed to master at newell/zynq-rs 2024-12-29 10:57:43 +08:00
213529cf7a update dependencies
4cfcc75d5c flake output hashes
578431cbc6 up cargo dependencies
6188fe7d69 silence inline_const warns
2713b459ed remove unused abi-blacklist
Compare 11 commits »
newell pushed to master at newell/nac3 2024-12-25 13:59:35 +08:00
1531b6cc98 cargo: update dependencies
9bbc40bbfa flake: update dependencies
790e56d106 msys2: update
a00eb7969e [core] codegen: Implement matrix_power
27a6f47330 [core] codegen: Implement construction of unsized ndarrays
Compare 87 commits »
newell pushed to master at newell/artiq-zynq 2024-11-22 02:08:23 +08:00
1f5ea41934 flake: update dependencies
7f83d56ef5 cargo fmt
1d431456f4 Fix DWARF parser treating catch blocks as unconditional
b03e380c1e flake: update dependencies
47fc53c4bf drtio_tuple -> drtio_context
Compare 31 commits »
newell pushed to master at newell/artiq-zynq 2024-11-19 01:34:51 +08:00
244c7396d9 runtime: handle drtio-eem satellite disconnection
newell pushed to master at newell/artiq-zynq 2024-11-17 10:11:02 +08:00
2c633409b8 Set FCLK0 for EBAZ4205
newell commented on pull request M-Labs/artiq-zynq#337 2024-11-17 10:08:25 +08:00
Set FCLK0 for EBAZ4205

It may be best to add documentation to the manual stating that int_150 is not supported for EBAZ4205.

newell commented on pull request M-Labs/artiq-zynq#337 2024-11-17 10:06:38 +08:00
Set FCLK0 for EBAZ4205

Is the divider setting glitch-free? Otherwise this needs to happen while the RTIO core is under reset. I'm not sure if the 142MHz setting is any useful, I would just make "150MHz" unsupported.…

newell pushed to set-fclk0 at newell/artiq-zynq 2024-11-17 10:04:52 +08:00
8cf0fa01a1 Remove 150 MHz option from set_fclk0_freq
newell created pull request M-Labs/artiq-zynq#337 2024-11-17 06:52:48 +08:00
Set FCLK0 for EBAZ4205
newell created branch set-fclk0 in newell/artiq-zynq 2024-11-17 06:34:09 +08:00
newell pushed to set-fclk0 at newell/artiq-zynq 2024-11-17 06:34:09 +08:00
ea8374d686 Set FCLK0 for EBAZ4205
newell pushed to master at newell/artiq-zynq 2024-11-17 05:00:49 +08:00
9774b39fd8 flake: update zynq-rs
9054e4a7cb flake: update zynq-rs, switch to oxalica rust overlay
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newell pushed to master at newell/zynq-rs 2024-11-17 04:52:16 +08:00
12975de2e1 flake: add missing attributes on rustc (for nixpkgs-unstable compat)
8c404829ef flake: update nixpkgs
8f041b017c switch to oxalica rust overlay
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newell pushed to master at newell/zynq-rs 2024-11-16 10:56:14 +08:00
5815baf88b Reorder Status.get_link to check for higher speeds before slower.
newell pushed to master at newell/artiq-zynq 2024-11-16 10:56:05 +08:00
d79bf8d54a gateware: Add default TTLs to EBAZ4205 (#335)
75e7fc55a3 flake: update dependencies
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newell created pull request M-Labs/zynq-rs#118 2024-11-16 05:13:25 +08:00
Reorder Status.get_link to check for higher speeds before slower.