forked from M-Labs/zynq-rs
add a println! for convenience
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b3b65f9b74
commit
d65398205f
21
src/main.rs
21
src/main.rs
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@ -6,7 +6,6 @@
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#![feature(compiler_builtins_lib)]
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#![feature(compiler_builtins_lib)]
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#![feature(never_type)]
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#![feature(never_type)]
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use core::fmt::Write;
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use core::mem::uninitialized;
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use core::mem::uninitialized;
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use r0::zero_bss;
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use r0::zero_bss;
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@ -16,7 +15,7 @@ mod regs;
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mod cortex_a9;
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mod cortex_a9;
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mod slcr;
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mod slcr;
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mod uart;
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mod uart;
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use uart::Uart;
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mod stdio;
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mod eth;
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mod eth;
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use crate::regs::{RegisterR, RegisterW};
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use crate::regs::{RegisterR, RegisterW};
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@ -71,31 +70,27 @@ fn l1_cache_init() {
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dccisw();
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dccisw();
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}
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}
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const UART_RATE: u32 = 115_200;
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fn main() {
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fn main() {
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let mut uart = Uart::serial(UART_RATE);
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println!("Main.");
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writeln!(uart, "\r\nHello World!\r");
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let mut eth = eth::Eth::default([0x0, 0x17, 0xde, 0xea, 0xbe, 0xef]);
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let mut eth = eth::Eth::default([0x0, 0x17, 0xde, 0xea, 0xbe, 0xef]);
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writeln!(uart, "Eth on\r");
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println!("Eth on");
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match eth::phy::Phy::find(&mut eth) {
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match eth::phy::Phy::find(&mut eth) {
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Some((addr, phy)) => {
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Some((addr, phy)) => {
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writeln!(uart, "Found {} PHY at addr {}\r", phy.name(), addr);
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println!("Found {} PHY at addr {}", phy.name(), addr);
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}
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}
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None => {
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None => {
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use eth::phy::PhyAccess;
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use eth::phy::PhyAccess;
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for addr in 1..32 {
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for addr in 1..32 {
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match eth::phy::id::identify_phy(&mut eth, addr) {
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match eth::phy::id::identify_phy(&mut eth, addr) {
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Some(identifier) => {
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Some(identifier) => {
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writeln!(uart, "phy {}: {:?}\r", addr, identifier);
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println!("phy {}: {:?}", addr, identifier);
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}
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}
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None => {}
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None => {}
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}
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}
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}
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}
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}
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}
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}
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}
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while !uart.tx_fifo_empty() {}
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let mut rx_buffers = [[0u8; 1536]; eth::rx::DESCS];
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let mut rx_buffers = [[0u8; 1536]; eth::rx::DESCS];
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let mut rx_buffer_ptrs: [&mut [u8]; eth::rx::DESCS] = unsafe {
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let mut rx_buffer_ptrs: [&mut [u8]; eth::rx::DESCS] = unsafe {
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@ -110,7 +105,7 @@ fn main() {
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match eth.recv_next() {
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match eth.recv_next() {
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None => {}
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None => {}
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Some(pkt) => {
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Some(pkt) => {
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writeln!(uart, "eth: received {} bytes\r", pkt.len());
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println!("eth: received {} bytes", pkt.len());
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}
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}
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}
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}
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}
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}
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@ -119,9 +114,7 @@ fn main() {
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#[panic_handler]
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#[panic_handler]
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fn panic(info: &core::panic::PanicInfo) -> ! {
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fn panic(info: &core::panic::PanicInfo) -> ! {
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let mut uart = Uart::serial(UART_RATE);
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println!("\nPanic: {}", info);
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writeln!(uart, "\r\nPanic: {}\r", info);
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while !uart.tx_fifo_empty() {}
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slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
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slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
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loop {}
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loop {}
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@ -0,0 +1,30 @@
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use crate::uart::Uart;
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const UART_RATE: u32 = 115_200;
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static mut UART: Option<Uart> = None;
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// TODO: locking for SMP
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#[doc(hidden)]
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pub fn get_uart() -> &'static mut Uart {
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unsafe {
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match &mut UART {
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None => {
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let mut uart = Uart::serial(UART_RATE);
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UART = Some(uart);
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UART.as_mut().unwrap()
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}
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Some(uart) => uart,
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}
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}
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}
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#[macro_export]
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macro_rules! println {
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($($arg:tt)*) => ({
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use core::fmt::Write;
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let uart = crate::stdio::get_uart();
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write!(uart, $($arg)*);
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write!(uart, "\r\n");
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while !uart.tx_fifo_empty() {}
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})
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}
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