newell/zynq-rs
1
0
Fork 0
forked from M-Labs/zynq-rs
Code Pull Requests Activity

Update eth/mod.rs

Browse Source
This commit is contained in:
newell 2024-09-23 11:25:41 -07:00
parent 6c3d901f00
commit c3d92abe99
1 changed files with 0 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
libboard_zynq/src/eth/mod.rs
View File

@ -298,16 +298,6 @@ impl Eth<Gem0, (), ()> {
);
});
// This didn't help, might not need, keep for now, and remove later to test.
#[cfg(feature = "target_ebaz4205")]
slcr::RegisterBlock::unlocked(|slcr| {
// VREF internal generator
slcr.gpiob_ctrl.write(
slcr::GpiobCtrl::zeroed()
.vref_en(true)
);
});
Self::gem0(macaddr)
}
@ -328,12 +318,8 @@ impl Eth<Gem1, (), ()> {
impl<GEM: Gem> Eth<GEM, (), ()> {
fn gem_common(macaddr: [u8; 6]) -> Self {
#[cfg(not(feature = "target_ebaz4205"))]
GEM::setup_clock(TX_1000);
#[cfg(feature = "target_ebaz4205")]
GEM::setup_clock(TX_100);
#[cfg(feature="target_kasli_soc")]
{
let mut eth_reset_pin = PhyRst::rst_pin();
@ -348,14 +334,6 @@ impl<GEM: Gem> Eth<GEM, (), ()> {
inner.configure(macaddr);
// Used for debugging MDIO
// loop {
// let _phy = Phy::find(&mut inner);
// for _ in 0..100_000_000 {
// asm::nop();
// }
// }
let phy = Phy::find(&mut inner).expect("phy");
phy.reset(&mut inner);
phy.restart_autoneg(&mut inner);