From 0c60d684e406a2cf4a7825e1e227ae5f5cc4087c Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 6 Jul 2020 13:06:10 +0800 Subject: [PATCH] slcr: remove soft reset Does not work and probably difficult to get to work. --- libboard_zynq/src/slcr.rs | 8 -------- libsupport_zynq/src/abort.rs | 2 -- libsupport_zynq/src/panic.rs | 1 - 3 files changed, 11 deletions(-) diff --git a/libboard_zynq/src/slcr.rs b/libboard_zynq/src/slcr.rs index f933bec..a0d85c9 100644 --- a/libboard_zynq/src/slcr.rs +++ b/libboard_zynq/src/slcr.rs @@ -265,14 +265,6 @@ impl RegisterBlock { r } - /// Perform a soft reset - pub fn soft_reset(&mut self) { - self.pss_rst_ctrl.write( - PssRstCtrl::zeroed() - .soft_rst(true) - ); - } - pub fn init_preload_fpga(&mut self) { // Assert FPGA top level output resets self.fpga_rst_ctrl.write( diff --git a/libsupport_zynq/src/abort.rs b/libsupport_zynq/src/abort.rs index e73d827..4d7f7f2 100644 --- a/libsupport_zynq/src/abort.rs +++ b/libsupport_zynq/src/abort.rs @@ -8,7 +8,6 @@ pub unsafe extern "C" fn PrefetchAbort() { println!("PrefetchAbort"); - slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset()); loop {} } @@ -20,6 +19,5 @@ pub unsafe extern "C" fn DataAbort() { println!("DataAbort on core {}", MPIDR.read() & CORE_MASK); println!("DFSR: {:03X}", DFSR.read()); - slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset()); loop {} } diff --git a/libsupport_zynq/src/panic.rs b/libsupport_zynq/src/panic.rs index 3beb487..db9c59d 100644 --- a/libsupport_zynq/src/panic.rs +++ b/libsupport_zynq/src/panic.rs @@ -14,6 +14,5 @@ fn panic(info: &core::panic::PanicInfo) -> ! { println!(""); } - slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset()); loop {} }