Hm, mainline ARTIQ doesn't seem to get stuck in a loop if PLL lock fails, just prints an error to the logs. Mostly because the check is done only once, without loop.
@sb10q - Should we apply the…
I'm also testing returning
axi.Response.slverr
on bursts longer than 1, but that's part of migen-axi too.
I went quite deep into it (e.g. learned that despite errors, axi transactions still…
That doesn't sound reliable and we may want to use
dmb
there as well.
That will have to be done internally within auto-generated CSR rust file (which is done within misoc, rather than this…
Looks like there's no need for volatile memory - data memory barrier (dmb
) seems to work as a good substitute.
I think bursts are not a problem with other (consecutive) CSR accesses as they're…