forked from M-Labs/thermostat
implement shdn* pins
This commit is contained in:
parent
b345cc0865
commit
e7782c9cb3
25
src/main.rs
25
src/main.rs
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@ -16,6 +16,7 @@ use cortex_m_rt::entry;
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use stm32f4xx_hal::{
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use stm32f4xx_hal::{
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hal::{
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hal::{
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self,
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self,
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digital::v2::OutputPin,
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watchdog::{WatchdogEnable, Watchdog},
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watchdog::{WatchdogEnable, Watchdog},
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},
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},
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rcc::RccExt,
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rcc::RccExt,
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@ -100,6 +101,8 @@ fn main() -> ! {
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let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
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let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
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dac1.set(0).unwrap();
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dac1.set(0).unwrap();
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let mut pwm = pins.pwm;
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let mut pwm = pins.pwm;
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let mut shdn0 = pins.shdn0;
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let mut shdn1 = pins.shdn1;
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timer::setup(cp.SYST, clocks);
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timer::setup(cp.SYST, clocks);
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@ -137,10 +140,14 @@ fn main() -> ! {
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if state.pid_enabled {
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if state.pid_enabled {
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// Forward PID output to i_set DAC
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// Forward PID output to i_set DAC
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match channel {
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match channel {
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0 =>
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0 => {
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dac0.set(state.dac_value).unwrap(),
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dac0.set(state.dac_value).unwrap();
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1 =>
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shdn0.set_high().unwrap();
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dac1.set(state.dac_value).unwrap(),
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}
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1 => {
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dac1.set(state.dac_value).unwrap();
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shdn1.set_high().unwrap();
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}
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_ =>
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_ =>
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unreachable!(),
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unreachable!(),
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}
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}
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@ -275,8 +282,14 @@ fn main() -> ! {
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Command::Pwm { channel, pin: PwmPin::ISet, duty } if duty <= ad5680::MAX_VALUE => {
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Command::Pwm { channel, pin: PwmPin::ISet, duty } if duty <= ad5680::MAX_VALUE => {
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channel_states[channel].pid_enabled = false;
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channel_states[channel].pid_enabled = false;
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match channel {
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match channel {
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0 => dac0.set(duty).unwrap(),
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0 => {
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1 => dac1.set(duty).unwrap(),
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dac0.set(duty).unwrap();
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shdn0.set_high().unwrap();
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}
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1 => {
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dac1.set(duty).unwrap();
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shdn1.set_high().unwrap();
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}
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_ => unreachable!(),
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_ => unreachable!(),
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}
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}
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channel_states[channel].dac_value = duty;
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channel_states[channel].dac_value = duty;
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29
src/pins.rs
29
src/pins.rs
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@ -1,4 +1,5 @@
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use stm32f4xx_hal::{
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use stm32f4xx_hal::{
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hal::digital::v2::OutputPin,
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gpio::{
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gpio::{
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AF5, Alternate,
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AF5, Alternate,
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gpioa::*,
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gpioa::*,
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@ -30,8 +31,10 @@ pub struct Pins {
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pub pwm: PwmPins,
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pub pwm: PwmPins,
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pub dac0_spi: Dac0Spi,
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pub dac0_spi: Dac0Spi,
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pub dac0_sync: PE4<Output<PushPull>>,
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pub dac0_sync: PE4<Output<PushPull>>,
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pub shdn0: PE10<Output<PushPull>>,
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pub dac1_spi: Dac1Spi,
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pub dac1_spi: Dac1Spi,
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pub dac1_sync: PF6<Output<PushPull>>,
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pub dac1_sync: PF6<Output<PushPull>>,
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pub shdn1: PE15<Output<PushPull>>,
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}
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}
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impl Pins {
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impl Pins {
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@ -58,15 +61,6 @@ impl Pins {
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let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15);
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let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15);
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let adc_nss = gpiob.pb12.into_push_pull_output();
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let adc_nss = gpiob.pb12.into_push_pull_output();
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let (dac0_spi, dac0_sync) = Self::setup_dac0(
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clocks, spi4,
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gpioe.pe2, gpioe.pe4, gpioe.pe6
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);
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let (dac1_spi, dac1_sync) = Self::setup_dac1(
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clocks, spi5,
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gpiof.pf7, gpiof.pf6, gpiof.pf9
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);
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let pwm = PwmPins::setup(
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let pwm = PwmPins::setup(
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clocks, tim1, tim3,
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clocks, tim1, tim3,
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gpioc.pc6, gpioc.pc7,
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gpioc.pc6, gpioc.pc7,
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@ -74,11 +68,24 @@ impl Pins {
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gpioe.pe13, gpioe.pe14
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gpioe.pe13, gpioe.pe14
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);
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);
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let (dac0_spi, dac0_sync) = Self::setup_dac0(
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clocks, spi4,
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gpioe.pe2, gpioe.pe4, gpioe.pe6
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);
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let mut shdn0 = gpioe.pe10.into_push_pull_output();
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let _ = shdn0.set_low();
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let (dac1_spi, dac1_sync) = Self::setup_dac1(
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clocks, spi5,
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gpiof.pf7, gpiof.pf6, gpiof.pf9
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);
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let mut shdn1 = gpioe.pe15.into_push_pull_output();
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let _ = shdn1.set_low();
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Pins {
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Pins {
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adc_spi, adc_nss,
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adc_spi, adc_nss,
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pwm,
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pwm,
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dac0_spi, dac0_sync,
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dac0_spi, dac0_sync, shdn0,
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dac1_spi, dac1_sync,
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dac1_spi, dac1_sync, shdn1,
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}
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}
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}
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}
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