implement shdn* pins

This commit is contained in:
Astro 2020-03-21 00:33:31 +01:00
parent b345cc0865
commit e7782c9cb3
2 changed files with 37 additions and 17 deletions

View File

@ -16,6 +16,7 @@ use cortex_m_rt::entry;
use stm32f4xx_hal::{ use stm32f4xx_hal::{
hal::{ hal::{
self, self,
digital::v2::OutputPin,
watchdog::{WatchdogEnable, Watchdog}, watchdog::{WatchdogEnable, Watchdog},
}, },
rcc::RccExt, rcc::RccExt,
@ -100,6 +101,8 @@ fn main() -> ! {
let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync); let mut dac1 = ad5680::Dac::new(pins.dac1_spi, pins.dac1_sync);
dac1.set(0).unwrap(); dac1.set(0).unwrap();
let mut pwm = pins.pwm; let mut pwm = pins.pwm;
let mut shdn0 = pins.shdn0;
let mut shdn1 = pins.shdn1;
timer::setup(cp.SYST, clocks); timer::setup(cp.SYST, clocks);
@ -137,10 +140,14 @@ fn main() -> ! {
if state.pid_enabled { if state.pid_enabled {
// Forward PID output to i_set DAC // Forward PID output to i_set DAC
match channel { match channel {
0 => 0 => {
dac0.set(state.dac_value).unwrap(), dac0.set(state.dac_value).unwrap();
1 => shdn0.set_high().unwrap();
dac1.set(state.dac_value).unwrap(), }
1 => {
dac1.set(state.dac_value).unwrap();
shdn1.set_high().unwrap();
}
_ => _ =>
unreachable!(), unreachable!(),
} }
@ -275,8 +282,14 @@ fn main() -> ! {
Command::Pwm { channel, pin: PwmPin::ISet, duty } if duty <= ad5680::MAX_VALUE => { Command::Pwm { channel, pin: PwmPin::ISet, duty } if duty <= ad5680::MAX_VALUE => {
channel_states[channel].pid_enabled = false; channel_states[channel].pid_enabled = false;
match channel { match channel {
0 => dac0.set(duty).unwrap(), 0 => {
1 => dac1.set(duty).unwrap(), dac0.set(duty).unwrap();
shdn0.set_high().unwrap();
}
1 => {
dac1.set(duty).unwrap();
shdn1.set_high().unwrap();
}
_ => unreachable!(), _ => unreachable!(),
} }
channel_states[channel].dac_value = duty; channel_states[channel].dac_value = duty;

View File

@ -1,4 +1,5 @@
use stm32f4xx_hal::{ use stm32f4xx_hal::{
hal::digital::v2::OutputPin,
gpio::{ gpio::{
AF5, Alternate, AF5, Alternate,
gpioa::*, gpioa::*,
@ -30,8 +31,10 @@ pub struct Pins {
pub pwm: PwmPins, pub pwm: PwmPins,
pub dac0_spi: Dac0Spi, pub dac0_spi: Dac0Spi,
pub dac0_sync: PE4<Output<PushPull>>, pub dac0_sync: PE4<Output<PushPull>>,
pub shdn0: PE10<Output<PushPull>>,
pub dac1_spi: Dac1Spi, pub dac1_spi: Dac1Spi,
pub dac1_sync: PF6<Output<PushPull>>, pub dac1_sync: PF6<Output<PushPull>>,
pub shdn1: PE15<Output<PushPull>>,
} }
impl Pins { impl Pins {
@ -58,15 +61,6 @@ impl Pins {
let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15); let adc_spi = Self::setup_spi_adc(clocks, spi2, gpiob.pb10, gpiob.pb14, gpiob.pb15);
let adc_nss = gpiob.pb12.into_push_pull_output(); let adc_nss = gpiob.pb12.into_push_pull_output();
let (dac0_spi, dac0_sync) = Self::setup_dac0(
clocks, spi4,
gpioe.pe2, gpioe.pe4, gpioe.pe6
);
let (dac1_spi, dac1_sync) = Self::setup_dac1(
clocks, spi5,
gpiof.pf7, gpiof.pf6, gpiof.pf9
);
let pwm = PwmPins::setup( let pwm = PwmPins::setup(
clocks, tim1, tim3, clocks, tim1, tim3,
gpioc.pc6, gpioc.pc7, gpioc.pc6, gpioc.pc7,
@ -74,11 +68,24 @@ impl Pins {
gpioe.pe13, gpioe.pe14 gpioe.pe13, gpioe.pe14
); );
let (dac0_spi, dac0_sync) = Self::setup_dac0(
clocks, spi4,
gpioe.pe2, gpioe.pe4, gpioe.pe6
);
let mut shdn0 = gpioe.pe10.into_push_pull_output();
let _ = shdn0.set_low();
let (dac1_spi, dac1_sync) = Self::setup_dac1(
clocks, spi5,
gpiof.pf7, gpiof.pf6, gpiof.pf9
);
let mut shdn1 = gpioe.pe15.into_push_pull_output();
let _ = shdn1.set_low();
Pins { Pins {
adc_spi, adc_nss, adc_spi, adc_nss,
pwm, pwm,
dac0_spi, dac0_sync, dac0_spi, dac0_sync, shdn0,
dac1_spi, dac1_sync, dac1_spi, dac1_sync, shdn1,
} }
} }