forked from M-Labs/humpback-dds
85 lines
1.9 KiB
Rust
85 lines
1.9 KiB
Rust
use embedded_hal::blocking::spi::Transfer;
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use cortex_m_semihosting::hprintln;
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use crate::Error;
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construct_bitmask!(CFR1Mask; u32;
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LSB_FIRST, 0, 1,
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SDIO_IN_ONLY, 1, 1,
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EXT_POWER_DOWN_CTRL, 3, 1,
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AUX_DAC_POWER_DOWN, 4, 1,
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REFCLK_IN_POWER_DOWN, 5, 1,
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DAC_POWER_DOWN, 6, 1,
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DIGITAL_POWER_DOWN, 7, 1,
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SEL_AUTO_OSK, 8, 1,
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OSK_ENABLE, 9, 1,
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LOAD_ARR_IO_UPDATE, 10, 1,
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CLEAR_PHASE_ACU, 11, 1,
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CLEAR_DIGITAL_RAMP_ACU, 12, 1,
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AUTOCLEAR_PHASE_ACU, 13, 1,
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AUTOCLEAR_DIGITAL_RAMP_ACU, 14, 1,
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LOAD_LRR_IO_UPDATE, 15, 1,
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SEL_DDS_SIN_OUT, 16, 1,
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PROFILE_CTRL, 17, 4,
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INV_SINC_FILTER_ENABLE, 22, 1,
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MANUAL_OSK_EXT_CTRL, 23, 1,
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RAM_PLAYBACK_DST, 29, 2,
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RAM_ENABLE, 31, 1
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);
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construct_bitmask!(CFR2Mask; u32;
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FM_GAIN, 0, 4,
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PARALLEL_DATA_PORT_ENABLE, 4, 1,
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SYNC_TIM_VALIDATION_DISABLE, 5, 1,
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DATA_ASSEM_HOLD_LAST_VALUE, 6, 1,
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MATCHED_LATENCY_ENABLE, 7, 1,
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TXENABLE_INV, 9, 1,
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PDCLK_INV, 10, 1,
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PDCLK_ENABLE, 11, 1,
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IO_UPDATE_RATE_CTRL, 14, 2,
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READ_EFFECTIVE_FTW, 16, 1,
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DIGITAL_RAMP_NO_DWELL_LOW, 17, 1,
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DIGITAL_RAMP_NO_DWELL_HIGH, 18, 1,
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DIGITAL_RAMP_ENABLE, 19, 1,
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DIGITAL_RAMP_DEST, 20, 2,
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SYNC_CLK_ENABLE, 22, 1,
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INT_IO_UPDATE_ACTIVE, 23, 1,
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EN_AMP_SCALE_SINGLE_TONE_PRO, 24, 1
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);
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construct_bitmask!(CFR3Mask; u32;
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N, 1, 7,
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PLL_ENABLE, 8, 1,
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PFD_RESET, 10, 1,
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REFCLK_IN_DIV_RESETB, 14, 1,
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REFCLK_IN_DIV_BYPASS, 15, 1,
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I_CP, 19, 3,
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VCO_SEL, 24, 3,
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DRV0, 28, 2
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)
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pub struct DDS<SPI> {
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spi: SPI,
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}
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impl<SPI, E> DDS<SPI>
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where
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SPI: Transfer<u8, Error= E>
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{
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pub fn new(spi: SPI) -> Self {
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DDS {
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spi
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}
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}
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}
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impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>
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where
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SPI: Transfer<u8, Error = E>
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{
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type Error = Error<E>;
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fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
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self.spi.transfer(words).map_err(Error::SPI)
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}
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}
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