forked from M-Labs/humpback-dds
367 lines
11 KiB
Rust
367 lines
11 KiB
Rust
#![no_main]
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#![no_std]
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#![feature(core_intrinsics)]
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#![feature(assoc_char_funcs)]
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#![feature(alloc_error_handler)]
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use log::{ trace, warn };
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::rng::Rng;
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use stm32h7xx_hal::{pac, prelude::*, spi};
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use stm32h7xx_hal::ethernet;
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use smoltcp as net;
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use SaiTLS as tls;
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use minimq::{ MqttClient, QoS };
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use cortex_m;
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use cortex_m_rt::entry;
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use alloc_cortex_m::CortexMHeap;
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use rtic::cyccnt::{Instant, U32Ext};
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use rand_core::{RngCore, CryptoRng};
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use tls::TlsRng;
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use tls::tls::TlsSocket;
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use tls::tcp_stack::NetworkStack;
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use heapless::{ String, consts, consts::* };
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use core::alloc::Layout;
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#[macro_use]
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pub mod bitmask_macro;
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pub mod spi_slave;
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pub mod cpld;
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use crate::cpld::CPLD;
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pub mod config_register;
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pub mod attenuator;
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pub mod dds;
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pub mod net_store;
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use crate::net_store::NetStorage;
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pub mod fpga;
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use crate::fpga::flash_ice40_fpga;
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pub mod mqtt_mux;
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use crate::mqtt_mux::MqttMux;
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pub mod urukul;
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use crate::urukul::Urukul;
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pub mod flash;
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pub mod config;
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use crate::config::get_net_config;
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pub mod flash_store;
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use crate::flash_store::init_flash;
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mod logger;
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#[global_allocator]
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static ALLOCATOR: CortexMHeap = CortexMHeap::empty();
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#[alloc_error_handler]
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fn oom(_: Layout) -> ! {
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warn!("Out of memory!");
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loop {}
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}
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static mut NET_STORE: NetStorage = NetStorage {
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// Placeholder for the real IP address, which is initialized at runtime.
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ip_addrs: [net::wire::IpCidr::Ipv6(
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net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
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)],
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neighbor_cache: [None; 8],
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routes_cache: [None; 8],
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};
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#[link_section = ".sram3.eth"]
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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#[link_section = ".sram3.tx_store"]
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static mut TX_STORAGE: [u8; 8192] = [0; 8192];
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#[link_section = ".sram3.rx_store"]
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static mut RX_STORAGE: [u8; 8192] = [0; 8192];
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struct RngStruct {
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rng: Rng
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}
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impl RngCore for RngStruct {
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fn next_u32(&mut self) -> u32 {
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self.rng.gen().unwrap()
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}
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fn next_u64(&mut self) -> u64 {
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(u64::from(self.next_u32()) << 32) | u64::from(self.next_u32())
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}
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fn fill_bytes(&mut self, dest: &mut [u8]) {
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self.rng.fill(dest).unwrap();
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}
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fn try_fill_bytes(&mut self, dest: &mut [u8]) -> Result<(), rand_core::Error> {
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Ok(self.fill_bytes(dest))
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}
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}
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impl CryptoRng for RngStruct {}
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impl TlsRng for RngStruct {}
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#[entry]
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fn main() -> ! {
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// Initialize the allocator BEFORE you use it
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let start = cortex_m_rt::heap_start() as usize;
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let size = 32768; // in bytes
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unsafe { ALLOCATOR.init(start, size) }
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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unsafe {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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logger::init();
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// Enable SRAM3 for the descriptor ring and smoltcp buffers.
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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// Enable SRAM2 for the RAM management buffer
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dp.RCC.ahb2enr.modify(|_, w| w.sram2en().set_bit());
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.use_hse(8.mhz())
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.sys_ck(400.mhz())
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.hclk(200.mhz())
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.pll1_q_ck(48.mhz())
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.pll1_r_ck(400.mhz())
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.freeze(vos, &dp.SYSCFG);
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let delay = cp.SYST.delay(ccdr.clocks);
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cp.SCB.invalidate_icache();
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cp.SCB.enable_icache();
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cp.DWT.enable_cycle_counter();
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// Instantiate random number generator
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let mut rng = RngStruct {
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rng: dp.RNG.constrain(ccdr.peripheral.RNG, &ccdr.clocks)
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};
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// Create sfkv store and flash storage manager
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let (flash, mut flash_store) = init_flash(dp.FLASH);
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// Acquire client/broker IP Address, client MAC address from flash memory
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let net_config = get_net_config(&mut flash_store);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let _gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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// Note: ITM doesn't work beyond this, due to a pin conflict between:
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// - FPGA_SPI: SCK (af5)
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// - ST_LINK SWO (af0)
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// Both demands PB3
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trace!("Flashing configuration bitstream to iCE40 HX8K on Humpback.");
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// Using SPI_1 alternate functions (af5)
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let fpga_sck = gpiob.pb3.into_alternate_af5();
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let fpga_sdo = gpiob.pb4.into_alternate_af5();
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let fpga_sdi = gpiob.pb5.into_alternate_af5();
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// Setup SPI_SS_B and CRESET_B
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let fpga_ss = gpioa.pa4.into_push_pull_output();
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let fpga_creset = gpiof.pf3.into_open_drain_output();
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// Setup CDONE
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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// Setup SPI interface
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let fpga_cfg_spi = dp.SPI1.spi(
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(fpga_sck, fpga_sdo, fpga_sdi),
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spi::MODE_3,
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12.mhz(),
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ccdr.peripheral.SPI1,
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&ccdr.clocks,
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);
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flash_ice40_fpga(fpga_cfg_spi, fpga_ss, fpga_creset, fpga_cdone, delay).unwrap();
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// Configure ethernet IO
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{
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let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
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}
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// Configure ethernet
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// let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
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let (eth_dma, mut eth_mac) = unsafe {
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ethernet::new_unchecked(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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&mut DES_RING,
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net_config.eth_addr.clone(),
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)
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};
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unsafe { ethernet::enable_interrupt() }
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let store = unsafe { &mut NET_STORE };
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store.ip_addrs[0] = net_config.ip_cidr;
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let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
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let mut routes = net::iface::Routes::new(&mut store.routes_cache[..]);
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let default_v4_gw = net::wire::Ipv4Address::new(192, 168, 1, 1);
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routes.add_default_ipv4_route(default_v4_gw).unwrap();
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let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma)
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.ethernet_addr(net_config.eth_addr)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut store.ip_addrs[..])
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.routes(routes)
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.finalize();
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/*
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* Using SPI6
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* SCLK -> PA5 (af8)
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* MOSI -> PG14 (af5)
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* MISO -> PA6 (af8)
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* CS -> 0: PB12, 1: PA15, 2: PC7
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*/
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let sclk = gpioa.pa5.into_alternate_af8().set_speed(Speed::VeryHigh);
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let mosi = gpiog.pg14.into_alternate_af5().set_speed(Speed::VeryHigh);
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let miso = gpioa.pa6.into_alternate_af8().set_speed(Speed::VeryHigh);
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let (cs0, cs1, cs2) = (
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gpiob.pb12.into_push_pull_output(),
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gpioa.pa15.into_push_pull_output(),
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gpioc.pc7.into_push_pull_output(),
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);
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/*
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* I/O_Update -> PB15
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*/
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let io_update = gpiob.pb15.into_push_pull_output();
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let spi = dp.SPI6.spi(
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(sclk, miso, mosi),
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spi::MODE_0,
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2.mhz(),
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ccdr.peripheral.SPI6,
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&ccdr.clocks,
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);
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let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update);
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let parts = switch.split();
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let urukul = Urukul::new(
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parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7
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);
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let mut mqtt_mux = MqttMux::new(urukul, flash, flash_store, net_config.name.as_str());
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// Time unit in ms
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let mut time: u32 = 0;
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// Cycle counter for 1 ms
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// This effectively provides a conversion from rtic unit to ms
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let mut next_ms = Instant::now();
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next_ms += 400_000.cycles();
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let mut tls_socket_entries: [_; 1] = Default::default();
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let mut tls_socket_set = tls::set::TlsSocketSet::new(
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&mut tls_socket_entries[..]
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);
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let tx_buffer = net::socket::TcpSocketBuffer::new(unsafe { &mut TX_STORAGE[..] });
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let rx_buffer = net::socket::TcpSocketBuffer::new(unsafe { &mut RX_STORAGE[..] });
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let mut tcp_socket = net::socket::TcpSocket::new(rx_buffer, tx_buffer);
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tcp_socket.set_keep_alive(
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Some(net::time::Duration::from_secs(2))
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);
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let tls_socket = TlsSocket::new(
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tcp_socket,
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&mut rng,
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None
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);
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let _ = tls_socket_set.add(tls_socket);
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let tls_stack = NetworkStack::new(
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tls_socket_set
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);
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let mut client = MqttClient::<consts::U2048, _>::new(
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net_config.broker_ip,
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net_config.name.as_str(),
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tls_stack,
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)
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.unwrap();
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let mut tick = false;
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let mut has_subscribed = false;
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loop {
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// Update time accumulator in ms
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// Tick once every ms
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if Instant::now() > next_ms {
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tick = true;
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time += 1;
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next_ms += 400_000.cycles();
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}
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// eth Poll if necessary
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// Do not poll if eth link is down
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while !eth_mac.phy_poll_link() {}
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client.network_stack.poll(&mut net_interface, net::time::Instant::from_millis(time));
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// Process MQTT messages about Urukul/Control
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let connection = match client
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.poll(|_client, topic, message, _properties| {
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mqtt_mux.process_mqtt_ingress(topic, message);
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}) {
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Ok(_) => true,
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Err(e) => {
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log::info!("Warn: {:?}", e);
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false
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},
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};
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// Process MQTT response messages about Urukul
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for (topic, message) in mqtt_mux.process_mqtt_egress().unwrap() {
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client.publish(
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topic.as_str(),
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message.as_bytes(),
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QoS::AtMostOnce,
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&[]
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).unwrap();
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}
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if connection && !has_subscribed && tick {
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let mut str_builder: String<U128> = String::from(net_config.name.as_str());
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str_builder.push_str("/Control/#").unwrap();
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match client.subscribe(str_builder.as_str(), &[]) {
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Ok(()) => has_subscribed = true,
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Err(minimq::Error::NotReady) => {},
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_e => {},
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};
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}
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// Reset tick flag
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tick = false;
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}
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}
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