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\documentclass[10pt]{datasheet}
\usepackage{palatino}
\usepackage{textgreek}
\usepackage{minted}
\usepackage{tcolorbox}
\usepackage{etoolbox}
\BeforeBeginEnvironment{minted}{\begin{tcolorbox}[colback=white]}%
\AfterEndEnvironment{minted}{\end{tcolorbox}}%
\usepackage[justification=centering]{caption}
\usepackage[utf8]{inputenc}
\usepackage[english]{babel}
\usepackage[english]{isodate}
\usepackage{graphicx}
\usepackage{subfig}
\usepackage{tikz}
\usepackage{pgfplots}
\usepackage{circuitikz}
\usetikzlibrary{calc}
\usetikzlibrary{fit,backgrounds}
\title{2245 LVDS-TTL}
\author{M-Labs Limited}
\date{December 2021}
\revision{Revision 1}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{16 LVDS channels.}
\item{Input and output capable.}
\item{No galvanic isolation.}
\item{High speed and low jitter.}
\item{RJ45 connectors.}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Photon counting.}
\item{External equipment trigger.}
\item{Optical shutter control.}
\item{Serial communication to remote devices.}
\end{itemize}
\section{General Description}
The 2245 LVDS-TTL card is a 4hp EEM module.
It adds general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
Each EEM connection provides eight digital channels each.
Each RJ45 connector exposes four digital channels.
The direction (input or output) of each channel can be selected using DIP switches.
Outputs are intended to drive 100\textOmega~loads, inputs are 100\textOmega~terminated.
This card can achieve higher speed and lower jitter than the isolated 2118/2128 BNC/SMA-TTL cards.
Only shielded Ethernet Cat-6 cables should be connected.
% Switch to next column
\vfill\break
\newcommand*{\MyLabel}[3][2cm]{\parbox{#1}{\centering #2 \\ #3}}
\newcommand*{\MymyLabel}[3][4cm]{\parbox{#1}{\centering #2 \\ #3}}
\begin{figure}[h]
\centering
\scalebox{0.88}{
\begin{circuitikz}[european, scale=0.95, every label/.append style={align=center}]
% RJ45 Connectors
\draw (0, 2.8) node[twoportshape, t={\MyLabel{RJ45}{CH 0-3}}, circuitikz/bipoles/twoport/width=1.4, scale=0.5, rotate=-90] (eth0) {};
\draw (0, 1.0) node[twoportshape, t={\MyLabel{RJ45}{CH 4-7}}, circuitikz/bipoles/twoport/width=1.4, scale=0.5, rotate=-90] (eth1) {};
\draw (0, -1.0) node[twoportshape, t={\MyLabel{RJ45}{CH 8-11}}, circuitikz/bipoles/twoport/width=1.4, scale=0.5, rotate=-90] (eth2) {};
\draw (0, -2.8) node[twoportshape, t={\MyLabel{RJ45}{CH 12-15}}, circuitikz/bipoles/twoport/width=1.4, scale=0.5, rotate=-90] (eth3) {};
% Repeaters for channels
% Channel 7 repeaters
\draw (1.8, 0.4) node[twoportshape, t={\MyLabel{CH 7}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep7) {};
% Omission dots
\node at (1.8, 0.8)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, 1.0)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, 1.2)[circle,fill,inner sep=0.7pt]{};
% Channel 4 repeaters
\draw (1.8, 1.6) node[twoportshape, t={\MyLabel{CH 4}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep4) {};
% Channel 3 repeaters
\draw (1.8, 2.2) node[twoportshape, t={\MyLabel{CH 3}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep3) {};
% Omission dots
\node at (1.8, 2.6)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, 2.8)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, 3.0)[circle,fill,inner sep=0.7pt]{};
% Channel 0 repeaters
\draw (1.8, 3.4) node[twoportshape, t={\MyLabel{CH 0}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep0) {};
% Channel 8 repeaters
\draw (1.8, -0.4) node[twoportshape, t={\MyLabel{CH 8}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep8) {};
% Omission dots
\node at (1.8, -0.8)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, -1.0)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, -1.2)[circle,fill,inner sep=0.7pt]{};
% Channel 11 repeaters
\draw (1.8, -1.6) node[twoportshape, t={\MyLabel{CH 11}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep11) {};
% Channel 12 repeaters
\draw (1.8, -2.2) node[twoportshape, t={\MyLabel{CH 12}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep12) {};
% Omission dots
\node at (1.8, -2.6)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, -2.8)[circle,fill,inner sep=0.7pt]{};
\node at (1.8, -3.0)[circle,fill,inner sep=0.7pt]{};
% Channel 15 repeaters
\draw (1.8, -3.4) node[twoportshape, t={\MyLabel{CH 15}{Repeaters}}, circuitikz/bipoles/twoport/width=1.6, scale=0.5] (rep15) {};
% Direction switches
\draw (4.6, 0.4) node[twoportshape,t=\MymyLabel{Per-channel \phantom{spac} x8 }{Input/Output Switch}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (ioswitch0) {};
\draw (4.6, -0.4) node[twoportshape,t=\MymyLabel{Per-channel \phantom{spac} x8 }{Input/Output Switch}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (ioswitch1) {};
\begin{scope}[xshift=5cm, yshift=0.65cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
\draw (0.4, 0) to[short,-o](0.75, 0);
\draw (0.78, 0)-- +(30: 0.46);
\draw (1.25, 0)to[short,o-](1.6, 0);
\end{scope}
\begin{scope}[xshift=5cm, yshift=-0.15cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
\draw (0.4, 0) to[short,-o](0.75, 0);
\draw (0.78, 0)-- +(30: 0.46);
\draw (1.25, 0)to[short,o-](1.6, 0);
\end{scope}
% I2C I/O expanders
\draw (4.6, 1.6) node[twoportshape,t=\MymyLabel{IO Expander}{for I2C Bus}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (i2c0) {};
\draw (4.6, -1.6) node[twoportshape,t=\MymyLabel{IO Expander}{for I2C Bus}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (i2c1) {};
% 2 Aesthetic EEPROMs
\draw (4.6, 2.2) node[twoportshape,t={EEPROM}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (eeprom0) {};
\draw (4.6, -2.2) node[twoportshape,t={EEPROM}, circuitikz/bipoles/twoport/width=2.7, scale=0.5] (eeprom1) {};
% EEMs from core device / controllers
\draw (7.2, 1.9) node[twoportshape, t={EEM Port 0}, circuitikz/bipoles/twoport/width=3.6, scale=0.7, rotate=-90] (eem0) {};
\draw (7.2, -1.9) node[twoportshape, t={EEM Port 1}, circuitikz/bipoles/twoport/width=3.6, scale=0.7, rotate=-90] (eem1) {};
% Connect RJ45 to LVDS DIO channels
% CH 0
\draw [latexslim-] (rep0.west) -- (0.7, 3.4);
\draw [-] (0.7, 3.4) -- (0.7, 3.1);
\draw [-latexslim] (0.7, 3.1) -- (0.25, 3.1);
% CH 1
\draw [latexslim-latexslim] (0.25, 2.9) -- (0.9, 2.9);
\node [label=center:\tiny{CH 1}] at (1.2, 2.9) {};
% CH 2
\draw [latexslim-latexslim] (0.25, 2.7) -- (0.9, 2.7);
\node [label=center:\tiny{CH 2}] at (1.2, 2.7) {};
% CH 3
\draw [latexslim-] (rep3.west) -- (0.7, 2.2);
\draw [-] (0.7, 2.2) -- (0.7, 2.5);
\draw [-latexslim] (0.7, 2.5) -- (0.25, 2.5);
% CH 4
\draw [latexslim-] (rep4.west) -- (0.7, 1.6);
\draw [-] (0.7, 1.6) -- (0.7, 1.3);
\draw [-latexslim] (0.7, 1.3) -- (0.25, 1.3);
% CH 5
\draw [latexslim-latexslim] (0.25, 1.1) -- (0.9, 1.1);
\node [label=center:\tiny{CH 5}] at (1.2, 1.1) {};
% CH 6
\draw [latexslim-latexslim] (0.25, 0.9) -- (0.9, 0.9);
\node [label=center:\tiny{CH 6}] at (1.2, 0.9) {};
% CH 7
\draw [latexslim-] (rep7.west) -- (0.7, 0.4);
\draw [-] (0.7, 0.4) -- (0.7, 0.7);
\draw [-latexslim] (0.7, 0.7) -- (0.25, 0.7);
% CH 8
\draw [latexslim-] (rep8.west) -- (0.7, -0.4);
\draw [-] (0.7, -0.4) -- (0.7, -0.7);
\draw [-latexslim] (0.7, -0.7) -- (0.25, -0.7);
% CH 9
\draw [latexslim-latexslim] (0.25, -0.9) -- (0.9, -0.9);
\node [label=center:\tiny{CH 9}] at (1.2, -0.9) {};
% CH 10
\draw [latexslim-latexslim] (0.25, -1.1) -- (0.9, -1.1);
\node [label=center:\tiny{CH 10}] at (1.2, -1.1) {};
% CH 11
\draw [latexslim-] (rep11.west) -- (0.7, -1.6);
\draw [-] (0.7, -1.6) -- (0.7, -1.3);
\draw [-latexslim] (0.7, -1.3) -- (0.25, -1.3);
% CH 12
\draw [latexslim-] (rep12.west) -- (0.7, -2.2);
\draw [-] (0.7, -2.2) -- (0.7, -2.5);
\draw [-latexslim] (0.7, -2.5) -- (0.25, -2.5);
% CH 13
\draw [latexslim-latexslim] (0.25, -2.7) -- (0.9, -2.7);
\node [label=center:\tiny{CH 13}] at (1.2, -2.7) {};
% CH 14
\draw [latexslim-latexslim] (0.25, -2.9) -- (0.9, -2.9);
\node [label=center:\tiny{CH 14}] at (1.2, -2.9) {};
% CH 15
\draw [latexslim-] (rep15.west) -- (0.7, -3.4);
\draw [-] (0.7, -3.4) -- (0.7, -3.1);
\draw [-latexslim] (0.7, -3.1) -- (0.25, -3.1);
% Interconnect repeaters controlled by EEM 0
\draw [latexslim-] (2.4, 3.5) -- (2.9, 3.5);
\draw [latexslim-] (2.4, 2.3) -- (2.9, 2.3);
\draw [latexslim-] (2.4, 1.7) -- (2.9, 1.7);
\draw [latexslim-] (2.4, 0.5) -- (2.9, 0.5);
\draw [-] (2.9, 3.5) -- (2.9, 0.5);
\draw [latexslim-] (2.4, 3.3) -- (3.1, 3.3);
\draw [latexslim-] (2.4, 2.1) -- (3.1, 2.1);
\draw [latexslim-] (2.4, 1.5) -- (3.1, 1.5);
\draw [latexslim-] (2.4, 0.3) -- (3.1, 0.3);
\draw [-] (3.1, 3.3) -- (3.1, 0.3);
% Interconnect repeaters controlled by EEM 1
\draw [latexslim-] (2.4, -3.5) -- (2.9, -3.5);
\draw [latexslim-] (2.4, -2.3) -- (2.9, -2.3);
\draw [latexslim-] (2.4, -1.7) -- (2.9, -1.7);
\draw [latexslim-] (2.4, -0.5) -- (2.9, -0.5);
\draw [-] (2.9, -3.5) -- (2.9, -0.5);
\draw [latexslim-] (2.4, -3.3) -- (3.1, -3.3);
\draw [latexslim-] (2.4, -2.1) -- (3.1, -2.1);
\draw [latexslim-] (2.4, -1.5) -- (3.1, -1.5);
\draw [latexslim-] (2.4, -0.3) -- (3.1, -0.3);
\draw [-] (3.1, -3.3) -- (3.1, -0.3);
% Junction between I/O expander and I/O switches
\node at (4.6, 1.0)[circle,fill,inner sep=0.7pt]{};
\draw [-latexslim] (i2c0.south) -- (4.6, 1.0);
\draw [-latexslim] (ioswitch0.north) -- (4.6, 1.0);
\draw [-] (4.6, 1.0) -- (3.1, 1.0);
\node at (4.6, -1.0)[circle,fill,inner sep=0.7pt]{};
\draw [-latexslim] (i2c1.north) -- (4.6, -1.0);
\draw [-latexslim] (ioswitch1.south) -- (4.6, -1.0);
\draw [-] (4.6, -1.0) -- (2.9, -1.0);
% Connect EEM Ports
\draw [-latexslim] (2.9, 2.8) -- (6.85, 2.8);
\draw [latexslim-latexslim] (eeprom0.east) -- (6.85, 2.2);
\draw [latexslim-latexslim] (i2c0.east) -- (6.85, 1.6);
\draw [-latexslim] (3.1, -2.8) -- (6.85, -2.8);
\draw [latexslim-latexslim] (eeprom1.east) -- (6.85, -2.2);
\draw [latexslim-latexslim] (i2c1.east) -- (6.85, -1.6);
\end{circuitikz}
}
\caption{Simplified Block Diagram}
\end{figure}
\begin{figure}[h]
\centering
\scalebox{0.88}{
\begin{circuitikz}[european, scale=0.95, every label/.append style={align=center}]
% Channel 0 input repeater
\draw (3, 3.8) node[buffer, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (rep_in0) {};
% Extra node to raise the upper boundary of the ch7 dotted area
\draw[color=white, text=black] (3, 5.3) node[twoportshape, circuitikz/bipoles/twoport/width=0.4, scale=0.4 ] (rep_out0_north) {};
% Left-extend the dotted area to enclose the intersection between input & output
\draw[color=white, text=black] (2.1, 5.2) node[twoportshape, circuitikz/bipoles/twoport/width=0.4, scale=0.4 ] (rep_out0_west) {};
% Right-extend the dotted area to enclose intersection & DIR text
\draw[color=white, text=black] (3.8, 5.2) node[twoportshape, circuitikz/bipoles/twoport/width=0.4, scale=0.4 ] (rep_out0_east) {};
% Channel 0 output repeater, defined after previous node to coverup white boundaries
\draw (3, 5.0) node[buffer, circuitikz/bipoles/twoport/width=1.2, scale=-0.5] (rep_out0) {};
% Channel 0 boundary
\node[draw, dotted, thick, rounded corners, inner xsep=0.7em, inner ysep=0.4em, fit=(rep_in0)(rep_out0)(rep_out0_north)(rep_out0_west)(rep_out0_east)] (sig0) {};
\node[fill=white, scale=0.7] at (sig0.north) {CH X Repeaters};
% Channel 0 direction line
\draw [latexslim-latexslim] (3, 4.0) -- (3, 4.8);
\draw [-] (3, 4.4) -- (4.6, 4.4);
\node [label=center:\tiny{CH X}] at (5.0, 4.5) {};
\node [label=center:\tiny{Direction}] at (5.0, 4.3) {};
% Expose & interconnect internal LVDS inputs
\node at (3.8, 5.0)[circle,fill,inner sep=0.7pt]{};
\draw [latexslim-] (rep_out0.west) -- (3.8, 5.0);
\draw [-latexslim] (rep_in0.east) -- (3.8, 3.8) -- (3.8, 5.0);
\draw [latexslim-latexslim] (3.8, 5.0) -- (4.6, 5.0);
\node [label=center:\tiny{CH X}] at (5.0, 5.1) {};
\node [label=center:\tiny{EEM I/O}] at (5.0, 4.9) {};
% Expose external LVDS I/O
\node at (2.1, 4.4)[circle,fill,inner sep=0.7pt]{};
\draw [-latexslim] (rep_out0.east) -- (2.1, 5.0) -- (2.1, 4.4);
\draw [latexslim-] (rep_in0.west) -- (2.1, 3.8) -- (2.1, 4.4);
\draw [latexslim-latexslim] (2.1, 4.4) -- (1.3, 4.4);
\node [label=center:\tiny{CH X}] at (0.9, 4.5) {};
\node [label=center:\tiny{LVDS I/O}] at (0.9, 4.3) {};
\end{circuitikz}
}
\caption{Detailed diagram for channel repeaters}
\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[width=1.5in]{photo2245.jpg}
\caption{LVDS-TTL Card photo}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\section{Electrical Specifications}
The Absolute Maximum Ratings are thorse values beyond which damage to the device may occur
Other specifications should be met without exception.
\begin{table}[h]
\begin{threeparttable}
\caption{Absolute Maximum Ratings}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
LVDS DC input voltage & $V_{IN}$ & -0.5 & & 4.6 & V \\
\hline
LVDS DC output voltage & $V_{OUT}$ & -0.5 & & 4.6 & V \\
\hline
Continuous Short Circuit Current & $I_{OSD}$ & & 10 & & mA \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\begin{threeparttable}
\caption{Recommended Input Voltage}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Magnitude of differential input & $|V_{ID}|$ & 0.1 & & 3.3 & V \\
\hline
Common mode input & $V_{IC}$ & $|V_{ID}|/2$ & & $3.3-|V_{ID}|/2$ & V \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
The recommended operating temperature is $-40\degree C \leq T_A \leq 85\degree C$.
All specifications are in the recommended operating temperature range unless otherwise noted.
All typical values of DC specifications are at $T_A = 25\degree C$.
\begin{table}[h]
\begin{threeparttable}
\caption{DC Specifications}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Differential input threshold HIGH & $V_{TH}$ & & & 100 & mV & \\
\hline
Differential input threshold LOW & $V_{TL}$ & -100 & & & mV & \\
\hline
Output differentiual Voltage & $V_{OD}$ & 250 & 330 & 450 & mV & \multirow{4}{*}{With 100$\Omega$ load.} \\
\cline{0-5}
$|V_{OD}|$ change (LOW-to-HIGH) & $\Delta V_{OD}$ & & & 25 & mV & \\
\cline{0-5}
Offset voltage & $V_{OS}$ & 1.125 & 1.23 & 1.375 & V & \\
\cline{0-5}
$|V_{OS}|$ change (LOW-to-HIGH) & $\Delta V_{OS}$ & & & 25 & mV & \\
\hline
Short circuit output current & $I_{OS}$ & & $\pm3.4$ & $\pm6$ & mA & \\
\hline
Input current & $I_{IN}$ & & & $\pm20$ & \textmu A & Recommended Input Voltage \\
\hline
Input capacitance & $C_{IN}$ & & 2.0 & & pF & \\
\hline
Output capacitance & $C_{OUT}$ & & 2.6 & & pF & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 300mV$, $V_{IC} = 1.3V$ unless otherwise specified.
\begin{table}[h]
\begin{threeparttable}
\caption{AC Specifications}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Differential Propagation delay & \multirow{2}{*}{$t_{PLHD}$} & \multirow{2}{*}{0.75} & \multirow{2}{*}{1.1} & \multirow{2}{*}{1.75} & \multirow{2}{*}{ns} & 100\textOmega~ between +/- outputs,\\
(LOW-to-HIGH) & & & & & & 5pF between each output and GND,\\
\cline{0-5}
Differential Propagation delay & \multirow{2}{*}{$t_{PHLD}$} & \multirow{2}{*}{0.75} & \multirow{2}{*}{1.1} & \multirow{2}{*}{1.75} & \multirow{2}{*}{ns} & $200 mV \leq V_{ID} \leq 450 mV$,\\
(HIGH-to-LOW) & & & & & & recommended $V_{IC}$,\\
\cline{0-5}
Differential Output Rise Time & \multirow{2}{*}{$t_{TLHD}$} & \multirow{2}{*}{0.29} & \multirow{2}{*}{0.40} & \multirow{2}{*}{0.58} & \multirow{2}{*}{ns} & duty Cycle = 50\%.\\
(20\% to 80\%) & & & & & & \\
\cline{0-5}
Differential Output Fall Time & \multirow{2}{*}{$t_{THLD}$} & \multirow{2}{*}{0.29} & \multirow{2}{*}{0.40} & \multirow{2}{*}{0.58} & \multirow{2}{*}{ns} & \\
(80\% to 20\%) & & & & & & \\
\cline{0-5}
Pulse skew & $t_{SK(P)}$ & & 0.01 & 0.2 & ns & \\
\cline{0-5}
Part-to-part skew & $t_{SK(PP)}$ & & & 0.5 & ns & \\
\hline
LVDS data jitter, & \multirow{2}{*}{$t_{DJ}$} & & \multirow{2}{*}{85} & \multirow{2}{*}{125} & \multirow{2}{*}{ps} & $PRBS=2^{23}-1$\\
deterministic & & & & & & 800 Mbps\\
\hline
LVDS clock jitter, & \multirow{2}{*}{$t_{RJ}$} & & \multirow{2}{*}{2.1} & \multirow{2}{*}{3.5} & \multirow{2}{*}{ps} & \multirow{2}{*}{400 MHz clock}\\
random (RMS) & & & & & & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\section{Example ARTIQ code}
The sections below demonstrate simple usage scenarios of the 2245 LVDS-TTL card with the ARTIQ control system.
They do not exhaustively demonstrate all the features of the ARTIQ system.
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
Timing accuracy in the examples below is well under 1 nanosecond thanks to the ARTIQ RTIO system.
\subsection{One pulse per second}
The channel should be configured as output in both the gateware and hardware.
\begin{minted}{python}
@kernel
def run(self):
self.core.reset()
while True:
self.ttl0.pulse(500*ms)
delay(500*ms)
\end{minted}
\newpage
\subsection{Morse code}
This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
\begin{minted}{python}
def prepare(self):
# As of ARTIQ-6, the ARTIQ compiler has limited string handling
# capabilities, so we pass a list of integers instead.
message = ".- .-. - .. --.-"
self.commands = [{".": 1, "-": 2, " ": 3}[c] for c in message]
@kernel
def run(self):
self.core.reset()
for cmd in self.commands:
if cmd == 1:
self.led.pulse(100*ms)
delay(100*ms)
if cmd == 2:
self.led.pulse(300*ms)
delay(100*ms)
if cmd == 3:
delay(700*ms)
\end{minted}
\subsection{Counting rising edges in a 1ms window}
The channel should be configured as input in both the gateware and hardware.
\begin{minted}{python}
@kernel
def run(self):
self.core.reset()
gate_end_mu = self.ttl0.gate_rising(1*ms)
counts = self.ttl0.count()
print(counts)
\end{minted}
This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second.
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
\begin{minted}{python}
@kernel
def run(self):
self.core.reset()
self.edgecounter0.gate_rising(1*ms)
counts = self.edgecounter0.fetch_count()
print(counts)
\end{minted}
\newpage
\subsection{Responding to an external trigger}
One channel needs to be configured as input, and the other as output.
\begin{minted}{python}
@kernel
def run(self):
self.core.reset()
self.ttlin.gate_rising(5*ms)
timestamp_mu = self.ttlin.timestamp_mu()
at_mu(timestamp_mu + self.core.seconds_to_mu(10*ms))
self.ttlout.pulse(1*us)
\end{minted}
\section{Ordering Information}
To order, please visit \url{https://m-labs.hk} and select the 2245 LVDS-TTL in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
\section*{}
\vspace*{\fill}
\begin{footnotesize}
Information furnished by M-Labs Limited is believed to be accurate and reliable. However, no responsibility is assumed by M-Labs Limited for its use, nor for any infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice.
\end{footnotesize}
\end{document}
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