forked from M-Labs/artiq-zynq
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No commits in common. "7d8268adf233bd297a5bcbf08b96a591e97bd75d" and "5597927df93caed628f99ca55db069affa3b8ae4" have entirely different histories.
7d8268adf2
...
5597927df9
28
flake.lock
28
flake.lock
|
|
@ -11,11 +11,11 @@
|
|||
"src-pythonparser": "src-pythonparser"
|
||||
},
|
||||
"locked": {
|
||||
"lastModified": 1695781625,
|
||||
"narHash": "sha256-zv8A0Mz2hIYLfD78GxLgXpOkTgnt/kT6rGWzP6NkXkM=",
|
||||
"lastModified": 1690427113,
|
||||
"narHash": "sha256-10XRV7vbdyr/NKDKmBWcVs+9/iYbj6f2bulMRhwy0JY=",
|
||||
"ref": "release-7",
|
||||
"rev": "cc81464f53a02cb41d7b4f9efae75f815c63ea4d",
|
||||
"revCount": 8185,
|
||||
"rev": "21c6f57ce18cdd0c41f467434d58c0b9193da374",
|
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"revCount": 8180,
|
||||
"type": "git",
|
||||
"url": "https://github.com/m-labs/artiq.git"
|
||||
},
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||||
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@ -85,11 +85,11 @@
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|||
"mozilla-overlay_2": {
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||||
"flake": false,
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||||
"locked": {
|
||||
"lastModified": 1695805681,
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||||
"narHash": "sha256-1ElPLD8eFfnuIk0G52HGGpRtQZ4QPCjChRlEOfkZ5ro=",
|
||||
"lastModified": 1687771476,
|
||||
"narHash": "sha256-TSpqz6qYVRoqkEdOCawEQ4/cWt/4pracmvw17HK1tgE=",
|
||||
"owner": "mozilla",
|
||||
"repo": "nixpkgs-mozilla",
|
||||
"rev": "6eabade97bc28d707a8b9d82ad13ef143836736e",
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||||
"rev": "3a44b8783514e7d6db4b63df96071b6c2b014b07",
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||||
"type": "github"
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||||
},
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||||
"original": {
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||||
|
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@ -101,11 +101,11 @@
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|||
"mozilla-overlay_3": {
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||||
"flake": false,
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||||
"locked": {
|
||||
"lastModified": 1695805681,
|
||||
"narHash": "sha256-1ElPLD8eFfnuIk0G52HGGpRtQZ4QPCjChRlEOfkZ5ro=",
|
||||
"lastModified": 1684487559,
|
||||
"narHash": "sha256-SZcJEM+NnLr8ctzeQf1BGAqBHzJ3jn+tdSeO7lszIJc=",
|
||||
"owner": "mozilla",
|
||||
"repo": "nixpkgs-mozilla",
|
||||
"rev": "6eabade97bc28d707a8b9d82ad13ef143836736e",
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||||
"rev": "e6ca26fe8b9df914d4567604e426fbc185d9ef3e",
|
||||
"type": "github"
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||||
},
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||||
"original": {
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||||
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@ -217,11 +217,11 @@
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|||
]
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||||
},
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||||
"locked": {
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||||
"lastModified": 1701572971,
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||||
"narHash": "sha256-f8IPIYenff7B8S3p/pjVxT/0HVZuJXtdg2jtMpaZEbM=",
|
||||
"lastModified": 1685182853,
|
||||
"narHash": "sha256-bEgE8Ph7MEHQr7S+xL33CxLuIm3AqvsaxBwUE1vHTdU=",
|
||||
"ref": "refs/heads/master",
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||||
"rev": "91bae572f913abc2f95acb899ca5afa33eeaa036",
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||||
"revCount": 634,
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"rev": "f20c0082645cfef34575661aeeff8d9c1ed1f127",
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||||
"revCount": 625,
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||||
"type": "git",
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||||
"url": "https://git.m-labs.hk/m-labs/zynq-rs"
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||||
},
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||||
|
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@ -134,7 +134,7 @@
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|||
cargoLock = {
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||||
lockFile = src/Cargo.lock;
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||||
outputHashes = {
|
||||
"libasync-0.0.0" = "sha256-f8IPIYenff7B8S3p/pjVxT/0HVZuJXtdg2jtMpaZEbM=";
|
||||
"libasync-0.0.0" = "sha256-xuwesRrQiccopPTCkwGqQxld74X74q7EVsKIrE0zirc=";
|
||||
};
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||||
};
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||||
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@ -378,4 +378,4 @@
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makeArtiqZynqPackage = build;
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};
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}
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}
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@ -219,7 +219,7 @@ dependencies = [
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[[package]]
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name = "libasync"
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version = "0.0.0"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
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||||
dependencies = [
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"embedded-hal",
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"libcortex_a9",
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@ -251,7 +251,7 @@ dependencies = [
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[[package]]
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name = "libboard_zynq"
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||||
version = "0.0.0"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
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||||
dependencies = [
|
||||
"bit_field",
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||||
"embedded-hal",
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@ -276,7 +276,7 @@ dependencies = [
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|||
[[package]]
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||||
name = "libconfig"
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||||
version = "0.1.0"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
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||||
dependencies = [
|
||||
"core_io",
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||||
"fatfs",
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||||
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@ -287,7 +287,7 @@ dependencies = [
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|||
[[package]]
|
||||
name = "libcortex_a9"
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||||
version = "0.0.0"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
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||||
dependencies = [
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||||
"bit_field",
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||||
"libregister",
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||||
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@ -303,7 +303,7 @@ checksum = "33a33a362ce288760ec6a508b94caaec573ae7d3bbbd91b87aa0bad4456839db"
|
|||
[[package]]
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||||
name = "libregister"
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||||
version = "0.0.0"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
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||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
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||||
dependencies = [
|
||||
"bit_field",
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||||
"vcell",
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||||
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@ -313,7 +313,7 @@ dependencies = [
|
|||
[[package]]
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||||
name = "libsupport_zynq"
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||||
version = "0.0.0"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#91bae572f913abc2f95acb899ca5afa33eeaa036"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#605c8f73a60cf41a6e2d535c5850933d3154e935"
|
||||
dependencies = [
|
||||
"cc",
|
||||
"compiler_builtins",
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||||
|
|
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@ -10,7 +10,6 @@ from migen.genlib.cdc import MultiReg
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from migen_axi.integration.soc_core import SoCCore
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from migen_axi.platforms import kasli_soc
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from misoc.interconnect.csr import *
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from misoc.cores import virtual_leds
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from misoc.integration import cpu_interface
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from artiq.coredevice import jsondesc
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@ -77,7 +76,7 @@ class RTIOCRG(Module, AutoCSR):
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MultiReg(pll_locked, self.pll_locked.status)
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]
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||||
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||||
|
||||
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eem_iostandard_dict = {
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0: "LVDS_25",
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||||
1: "LVDS_25",
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||||
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@ -114,7 +113,6 @@ class SMAClkinForward(Module):
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class GenericStandalone(SoCCore):
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def __init__(self, description, acpki=False):
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self.acpki = acpki
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sys_clk_freq = 125e6
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platform = kasli_soc.Platform()
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platform.toolchain.bitstream_commands.extend([
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@ -125,8 +123,6 @@ class GenericStandalone(SoCCore):
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ident = "acpki_" + ident
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SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
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self.config["hw_rev"] = description["hw_rev"]
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platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
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platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
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@ -143,7 +139,6 @@ class GenericStandalone(SoCCore):
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self.ps7.cd_sys.clk,
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self.rtio_crg.cd_rtio.clk)
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fix_serdes_timing_path(platform)
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self.config["CLOCK_FREQUENCY"] = int(sys_clk_freq)
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self.rtio_channels = []
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has_grabber = any(peripheral["type"] == "grabber" for peripheral in description["peripherals"])
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@ -160,9 +155,7 @@ class GenericStandalone(SoCCore):
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self.rtio_channels.append(rtio.LogChannel())
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self.submodules.rtio_tsc = rtio.TSC("async", glbl_fine_ts_width=3)
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self.submodules.rtio_core = rtio.Core(
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||||
self.rtio_tsc, self.rtio_channels, lane_count=description["sed_lanes"]
|
||||
)
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self.submodules.rtio_core = rtio.Core(self.rtio_tsc, self.rtio_channels)
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||||
self.csr_devices.append("rtio_core")
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||||
if self.acpki:
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|
@ -216,8 +209,6 @@ class GenericMaster(SoCCore):
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ident = "acpki_" + ident
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SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
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self.config["hw_rev"] = description["hw_rev"]
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||||
platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
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platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
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||||
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||||
|
|
@ -230,7 +221,6 @@ class GenericMaster(SoCCore):
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|||
pads=data_pads,
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sys_clk_freq=sys_clk_freq)
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||||
self.csr_devices.append("drtio_transceiver")
|
||||
self.config["CLOCK_FREQUENCY"] = int(sys_clk_freq)
|
||||
|
||||
self.crg = self.ps7 # HACK for eem_7series to find the clock
|
||||
self.submodules.rtio_crg = RTIOClockMultiplier(rtio_clk_freq)
|
||||
|
|
@ -289,9 +279,7 @@ class GenericMaster(SoCCore):
|
|||
self.add_csr_group("drtioaux", drtioaux_csr_group)
|
||||
self.add_memory_group("drtioaux_mem", drtioaux_memory_group)
|
||||
|
||||
self.submodules.rtio_core = rtio.Core(
|
||||
self.rtio_tsc, self.rtio_channels, lane_count=description["sed_lanes"]
|
||||
)
|
||||
self.submodules.rtio_core = rtio.Core(self.rtio_tsc, self.rtio_channels)
|
||||
self.csr_devices.append("rtio_core")
|
||||
|
||||
if self.acpki:
|
||||
|
|
@ -329,15 +317,10 @@ class GenericMaster(SoCCore):
|
|||
self.config["HAS_GRABBER"] = None
|
||||
self.add_csr_group("grabber", self.grabber_csr_group)
|
||||
|
||||
self.submodules.virtual_leds = virtual_leds.VirtualLeds()
|
||||
self.csr_devices.append("virtual_leds")
|
||||
|
||||
self.comb += [self.virtual_leds.get(i).eq(channel.rx_ready)
|
||||
for i, channel in enumerate(self.drtio_transceiver.channels)]
|
||||
|
||||
class GenericSatellite(SoCCore):
|
||||
def __init__(self, description, acpki=False):
|
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sys_clk_freq = 125e6
|
||||
sys_clk_freq = 125e6
|
||||
rtio_clk_freq = description["rtio_frequency"]
|
||||
|
||||
self.acpki = acpki
|
||||
|
|
@ -351,8 +334,6 @@ class GenericSatellite(SoCCore):
|
|||
ident = "acpki_" + ident
|
||||
SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
|
||||
|
||||
self.config["hw_rev"] = description["hw_rev"]
|
||||
|
||||
platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
|
||||
platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
|
||||
|
||||
|
|
@ -360,7 +341,7 @@ class GenericSatellite(SoCCore):
|
|||
self.submodules.rtio_crg = RTIOClockMultiplier(rtio_clk_freq)
|
||||
self.csr_devices.append("rtio_crg")
|
||||
fix_serdes_timing_path(platform)
|
||||
|
||||
|
||||
data_pads = [platform.request("sfp", i) for i in range(4)]
|
||||
|
||||
self.submodules.drtio_transceiver = gtx_7series.GTX(
|
||||
|
|
@ -448,9 +429,7 @@ class GenericSatellite(SoCCore):
|
|||
self.submodules.rtio_dma = dma.DMA(self.ps7.s_axi_hp0)
|
||||
self.csr_devices.append("rtio_dma")
|
||||
|
||||
self.submodules.local_io = SyncRTIO(
|
||||
self.rtio_tsc, self.rtio_channels, lane_count=description["sed_lanes"]
|
||||
)
|
||||
self.submodules.local_io = SyncRTIO(self.rtio_tsc, self.rtio_channels)
|
||||
self.comb += self.drtiosat.async_errors.eq(self.local_io.async_errors)
|
||||
|
||||
self.submodules.cri_con = rtio.CRIInterconnectShared(
|
||||
|
|
@ -467,7 +446,6 @@ class GenericSatellite(SoCCore):
|
|||
|
||||
rtio_clk_period = 1e9/rtio_clk_freq
|
||||
self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6)
|
||||
self.config["CLOCK_FREQUENCY"] = int(sys_clk_freq)
|
||||
|
||||
self.submodules.siphaser = SiPhaser7Series(
|
||||
si5324_clkin=platform.request("cdr_clk"),
|
||||
|
|
@ -495,12 +473,7 @@ class GenericSatellite(SoCCore):
|
|||
self.config["HAS_GRABBER"] = None
|
||||
self.add_csr_group("grabber", self.grabber_csr_group)
|
||||
# no RTIO CRG here
|
||||
|
||||
self.submodules.virtual_leds = virtual_leds.VirtualLeds()
|
||||
self.csr_devices.append("virtual_leds")
|
||||
|
||||
self.comb += [self.virtual_leds.get(i).eq(channel.rx_ready)
|
||||
for i, channel in enumerate(self.drtio_transceiver.channels)]
|
||||
|
||||
|
||||
def write_mem_file(soc, filename):
|
||||
with open(filename, "w") as f:
|
||||
|
|
|
|||
|
|
@ -451,7 +451,6 @@ class _SatelliteBase(SoCCore):
|
|||
def add_rtio(self, rtio_channels):
|
||||
self.submodules.rtio_moninj = rtio.MonInj(rtio_channels)
|
||||
self.csr_devices.append("rtio_moninj")
|
||||
self.rustc_cfg["has_rtio_moninj"] = None
|
||||
|
||||
if self.acpki:
|
||||
self.rustc_cfg["ki_impl"] = "acp"
|
||||
|
|
|
|||
|
|
@ -1,163 +0,0 @@
|
|||
use log::info;
|
||||
|
||||
use crate::pl::csr;
|
||||
|
||||
#[derive(PartialEq, Clone, Copy)]
|
||||
enum State {
|
||||
Reset,
|
||||
ExitReset,
|
||||
Lock,
|
||||
Align,
|
||||
Watch,
|
||||
}
|
||||
|
||||
#[derive(Clone, Copy)]
|
||||
struct Info {
|
||||
state: State,
|
||||
frame_size: (u16, u16),
|
||||
}
|
||||
|
||||
static mut INFO: [Info; csr::GRABBER_LEN] = [Info {
|
||||
state: State::Reset,
|
||||
frame_size: (0, 0),
|
||||
}; csr::GRABBER_LEN];
|
||||
|
||||
fn get_pll_reset(g: usize) -> bool {
|
||||
unsafe { (csr::GRABBER[g].pll_reset_read)() != 0 }
|
||||
}
|
||||
|
||||
fn set_pll_reset(g: usize, reset: bool) {
|
||||
let val = if reset { 1 } else { 0 };
|
||||
unsafe { (csr::GRABBER[g].pll_reset_write)(val) }
|
||||
}
|
||||
|
||||
fn pll_locked(g: usize) -> bool {
|
||||
unsafe { (csr::GRABBER[g].pll_locked_read)() != 0 }
|
||||
}
|
||||
|
||||
fn clock_pattern_ok(g: usize) -> bool {
|
||||
unsafe { (csr::GRABBER[g].clk_sampled_read)() == 0b1100011 }
|
||||
}
|
||||
|
||||
fn clock_pattern_ok_filter(g: usize) -> bool {
|
||||
for _ in 0..128 {
|
||||
if !clock_pattern_ok(g) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
true
|
||||
}
|
||||
|
||||
fn phase_shift(g: usize, direction: u8) {
|
||||
unsafe {
|
||||
(csr::GRABBER[g].phase_shift_write)(direction);
|
||||
while (csr::GRABBER[g].phase_shift_done_read)() == 0 {}
|
||||
}
|
||||
}
|
||||
|
||||
fn clock_align(g: usize) -> bool {
|
||||
while clock_pattern_ok_filter(g) {
|
||||
phase_shift(g, 1);
|
||||
}
|
||||
phase_shift(g, 1);
|
||||
|
||||
let mut count = 0;
|
||||
while !clock_pattern_ok_filter(g) {
|
||||
phase_shift(g, 1);
|
||||
count += 1;
|
||||
if count > 1024 {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
let mut window = 1;
|
||||
phase_shift(g, 1);
|
||||
while clock_pattern_ok_filter(g) {
|
||||
phase_shift(g, 1);
|
||||
window += 1;
|
||||
}
|
||||
|
||||
for _ in 0..window / 2 {
|
||||
phase_shift(g, 0);
|
||||
}
|
||||
|
||||
true
|
||||
}
|
||||
|
||||
fn get_last_pixels(g: usize) -> (u16, u16) {
|
||||
unsafe { ((csr::GRABBER[g].last_x_read)(), (csr::GRABBER[g].last_y_read)()) }
|
||||
}
|
||||
|
||||
fn get_video_clock(g: usize) -> u32 {
|
||||
let freq_count = unsafe { (csr::GRABBER[g].freq_count_read)() } as u32;
|
||||
2 * freq_count * (csr::CONFIG_CLOCK_FREQUENCY / 1000) / (511 * 1000)
|
||||
}
|
||||
|
||||
pub fn tick() {
|
||||
for g in 0..csr::GRABBER.len() {
|
||||
let next = match unsafe { INFO[g].state } {
|
||||
State::Reset => {
|
||||
set_pll_reset(g, true);
|
||||
unsafe {
|
||||
INFO[g].frame_size = (0, 0);
|
||||
}
|
||||
State::ExitReset
|
||||
}
|
||||
State::ExitReset => {
|
||||
if get_pll_reset(g) {
|
||||
set_pll_reset(g, false);
|
||||
State::Lock
|
||||
} else {
|
||||
State::ExitReset
|
||||
}
|
||||
}
|
||||
State::Lock => {
|
||||
if pll_locked(g) {
|
||||
info!("grabber{} locked: {}MHz", g, get_video_clock(g));
|
||||
State::Align
|
||||
} else {
|
||||
State::Lock
|
||||
}
|
||||
}
|
||||
State::Align => {
|
||||
if pll_locked(g) {
|
||||
if clock_align(g) {
|
||||
info!("grabber{} alignment success", g);
|
||||
State::Watch
|
||||
} else {
|
||||
info!("grabber{} alignment failure", g);
|
||||
State::Reset
|
||||
}
|
||||
} else {
|
||||
info!("grabber{} lock lost", g);
|
||||
State::Reset
|
||||
}
|
||||
}
|
||||
State::Watch => {
|
||||
if pll_locked(g) {
|
||||
if clock_pattern_ok(g) {
|
||||
let last_xy = get_last_pixels(g);
|
||||
if last_xy != unsafe { INFO[g].frame_size } {
|
||||
// x capture is on ~LVAL which is after
|
||||
// the last increment on DVAL
|
||||
// y capture is on ~FVAL which coincides with the
|
||||
// last increment on ~LVAL
|
||||
info!("grabber{} frame size: {}x{}", g, last_xy.0, last_xy.1 + 1);
|
||||
unsafe { INFO[g].frame_size = last_xy }
|
||||
}
|
||||
State::Watch
|
||||
} else {
|
||||
info!("grabber{} alignment lost", g);
|
||||
State::Reset
|
||||
}
|
||||
} else {
|
||||
info!("grabber{} lock lost", g);
|
||||
State::Reset
|
||||
}
|
||||
}
|
||||
};
|
||||
unsafe {
|
||||
INFO[g].state = next;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,8 +1,6 @@
|
|||
use libboard_zynq::i2c;
|
||||
use log::info;
|
||||
|
||||
use crate::pl::csr;
|
||||
|
||||
// Only the bare minimum registers. Bits/IO connections equivalent between IC types.
|
||||
struct Registers {
|
||||
// PCA9539 equivalent register names in comments
|
||||
|
|
@ -12,28 +10,8 @@ struct Registers {
|
|||
gpiob: u8, // Output Port 1
|
||||
}
|
||||
|
||||
//IO expanders pins
|
||||
const IODIR_OUT_SFP_TX_DISABLE: u8 = 0x02;
|
||||
const IODIR_OUT_SFP_LED: u8 = 0x40;
|
||||
#[cfg(hw_rev = "v1.0")]
|
||||
const IODIR_OUT_SFP0_LED: u8 = 0x40;
|
||||
#[cfg(hw_rev = "v1.1")]
|
||||
const IODIR_OUT_SFP0_LED: u8 = 0x80;
|
||||
|
||||
//IO expander port direction
|
||||
const IODIR0: [u8; 2] = [
|
||||
0xFF & !IODIR_OUT_SFP_TX_DISABLE & !IODIR_OUT_SFP0_LED,
|
||||
0xFF & !IODIR_OUT_SFP_TX_DISABLE & !IODIR_OUT_SFP_LED,
|
||||
];
|
||||
|
||||
const IODIR1: [u8; 2] = [
|
||||
0xFF & !IODIR_OUT_SFP_TX_DISABLE & !IODIR_OUT_SFP_LED,
|
||||
0xFF & !IODIR_OUT_SFP_TX_DISABLE & !IODIR_OUT_SFP_LED,
|
||||
];
|
||||
|
||||
pub struct IoExpander {
|
||||
address: u8,
|
||||
virtual_led_mapping: &'static [(u8, u8, u8)],
|
||||
iodir: [u8; 2],
|
||||
out_current: [u8; 2],
|
||||
out_target: [u8; 2],
|
||||
|
|
@ -42,19 +20,12 @@ pub struct IoExpander {
|
|||
|
||||
impl IoExpander {
|
||||
pub fn new(i2c: &mut i2c::I2c, index: u8) -> Result<Self, &'static str> {
|
||||
#[cfg(hw_rev = "v1.0")]
|
||||
const VIRTUAL_LED_MAPPING0: [(u8, u8, u8); 2] = [(0, 0, 6), (1, 1, 6)];
|
||||
#[cfg(hw_rev = "v1.1")]
|
||||
const VIRTUAL_LED_MAPPING0: [(u8, u8, u8); 2] = [(0, 0, 7), (1, 1, 6)];
|
||||
|
||||
const VIRTUAL_LED_MAPPING1: [(u8, u8, u8); 2] = [(2, 0, 6), (3, 1, 6)];
|
||||
|
||||
// Both expanders on SHARED I2C bus
|
||||
let mut io_expander = match index {
|
||||
0 => IoExpander {
|
||||
address: 0x40,
|
||||
virtual_led_mapping: &VIRTUAL_LED_MAPPING0,
|
||||
iodir: IODIR0,
|
||||
iodir: [0xff; 2],
|
||||
out_current: [0; 2],
|
||||
out_target: [0; 2],
|
||||
registers: Registers {
|
||||
|
|
@ -66,8 +37,7 @@ impl IoExpander {
|
|||
},
|
||||
1 => IoExpander {
|
||||
address: 0x42,
|
||||
virtual_led_mapping: &VIRTUAL_LED_MAPPING1,
|
||||
iodir: IODIR1,
|
||||
iodir: [0xff; 2],
|
||||
out_current: [0; 2],
|
||||
out_target: [0; 2],
|
||||
registers: Registers {
|
||||
|
|
@ -154,12 +124,6 @@ impl IoExpander {
|
|||
}
|
||||
|
||||
pub fn service(&mut self, i2c: &mut i2c::I2c) -> Result<(), &'static str> {
|
||||
#[cfg(has_virtual_leds)]
|
||||
for (led, port, bit) in self.virtual_led_mapping.iter() {
|
||||
let level = unsafe { csr::virtual_leds::status_read() >> led & 1 };
|
||||
self.set(*port, *bit, level != 0);
|
||||
}
|
||||
|
||||
if self.out_target != self.out_current {
|
||||
self.select(i2c)?;
|
||||
if self.out_target[0] != self.out_current[0] {
|
||||
|
|
|
|||
|
|
@ -27,10 +27,8 @@ pub mod drtioaux_async;
|
|||
#[cfg(has_drtio)]
|
||||
#[path = "../../../build/mem.rs"]
|
||||
pub mod mem;
|
||||
#[cfg(all(feature = "target_kasli_soc", has_drtio))]
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
pub mod io_expander;
|
||||
#[cfg(has_grabber)]
|
||||
pub mod grabber;
|
||||
|
||||
use core::{cmp, str};
|
||||
use libboard_zynq::slcr;
|
||||
|
|
|
|||
|
|
@ -11,8 +11,6 @@
|
|||
|
||||
extern crate alloc;
|
||||
|
||||
#[cfg(all(feature = "target_kasli_soc", has_drtio))]
|
||||
use core::cell::RefCell;
|
||||
use log::{info, warn, error};
|
||||
|
||||
use libboard_zynq::{timer::GlobalTimer, mpcore, gic};
|
||||
|
|
@ -23,7 +21,7 @@ use void::Void;
|
|||
use libconfig::Config;
|
||||
use libcortex_a9::l2c::enable_l2_cache;
|
||||
use libboard_artiq::{logger, identifier_read, init_gateware, pl};
|
||||
#[cfg(all(feature = "target_kasli_soc", has_drtio))]
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
use libboard_artiq::io_expander;
|
||||
|
||||
const ASYNC_ERROR_COLLISION: u8 = 1 << 0;
|
||||
|
|
@ -93,39 +91,6 @@ async fn report_async_rtio_errors() {
|
|||
|
||||
|
||||
|
||||
#[cfg(all(feature = "target_kasli_soc", has_drtio))]
|
||||
async fn io_expanders_service(
|
||||
i2c_bus: RefCell<&mut libboard_zynq::i2c::I2c>,
|
||||
io_expander0: RefCell<io_expander::IoExpander>,
|
||||
io_expander1: RefCell<io_expander::IoExpander>,
|
||||
) {
|
||||
loop {
|
||||
task::r#yield().await;
|
||||
io_expander0
|
||||
.borrow_mut()
|
||||
.service(&mut i2c_bus.borrow_mut())
|
||||
.expect("I2C I/O expander #0 service failed");
|
||||
io_expander1
|
||||
.borrow_mut()
|
||||
.service(&mut i2c_bus.borrow_mut())
|
||||
.expect("I2C I/O expander #1 service failed");
|
||||
}
|
||||
}
|
||||
#[cfg(has_grabber)]
|
||||
mod grabber {
|
||||
use libasync::delay;
|
||||
use libboard_artiq::grabber;
|
||||
use libboard_zynq::time::Milliseconds;
|
||||
use crate::GlobalTimer;
|
||||
pub async fn grabber_thread(timer: GlobalTimer) {
|
||||
let mut countdown = timer.countdown();
|
||||
loop {
|
||||
grabber::tick();
|
||||
delay(&mut countdown, Milliseconds(200)).await;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static mut LOG_BUFFER: [u8; 1<<17] = [0; 1<<17];
|
||||
|
||||
#[no_mangle]
|
||||
|
|
@ -149,29 +114,31 @@ pub fn main_core0() {
|
|||
info!("gateware ident: {}", identifier_read(&mut [0; 64]));
|
||||
|
||||
i2c::init();
|
||||
#[cfg(all(feature = "target_kasli_soc", has_drtio))]
|
||||
let i2c_bus = unsafe { (i2c::I2C_BUS).as_mut().unwrap() };
|
||||
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
let (mut io_expander0, mut io_expander1);
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
{
|
||||
let i2c_bus = unsafe { (i2c::I2C_BUS).as_mut().unwrap() };
|
||||
let mut io_expander0 = io_expander::IoExpander::new(i2c_bus, 0).unwrap();
|
||||
let mut io_expander1 = io_expander::IoExpander::new(i2c_bus, 1).unwrap();
|
||||
io_expander0 = io_expander::IoExpander::new(i2c_bus, 0).unwrap();
|
||||
io_expander1 = io_expander::IoExpander::new(i2c_bus, 1).unwrap();
|
||||
io_expander0
|
||||
.init(i2c_bus)
|
||||
.expect("I2C I/O expander #0 initialization failed");
|
||||
io_expander1
|
||||
.init(i2c_bus)
|
||||
.expect("I2C I/O expander #1 initialization failed");
|
||||
// Drive TX_DISABLE to false on SFP0..3
|
||||
// Actively drive TX_DISABLE to false on SFP0..3
|
||||
io_expander0.set_oe(i2c_bus, 0, 1 << 1).unwrap();
|
||||
io_expander1.set_oe(i2c_bus, 0, 1 << 1).unwrap();
|
||||
io_expander0.set_oe(i2c_bus, 1, 1 << 1).unwrap();
|
||||
io_expander1.set_oe(i2c_bus, 1, 1 << 1).unwrap();
|
||||
io_expander0.set(0, 1, false);
|
||||
io_expander1.set(0, 1, false);
|
||||
io_expander0.set(1, 1, false);
|
||||
io_expander1.set(1, 1, false);
|
||||
io_expander0.service(i2c_bus).unwrap();
|
||||
io_expander1.service(i2c_bus).unwrap();
|
||||
task::spawn(io_expanders_service(
|
||||
RefCell::new(i2c_bus),
|
||||
RefCell::new(io_expander0),
|
||||
RefCell::new(io_expander1),
|
||||
));
|
||||
}
|
||||
|
||||
let cfg = match Config::new() {
|
||||
|
|
@ -186,8 +153,5 @@ pub fn main_core0() {
|
|||
|
||||
task::spawn(report_async_rtio_errors());
|
||||
|
||||
#[cfg(has_grabber)]
|
||||
task::spawn(grabber::grabber_thread(timer));
|
||||
|
||||
comms::main(timer, cfg);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -61,7 +61,6 @@ mod remote_moninj {
|
|||
use libboard_artiq::drtioaux_async;
|
||||
use crate::rtio_mgt::drtio;
|
||||
use log::error;
|
||||
use libasync::delay;
|
||||
|
||||
pub async fn read_probe(aux_mutex: &Rc<Mutex<bool>>, timer: GlobalTimer, linkno: u8, destination: u8, channel: i32, probe: i8) -> i64 {
|
||||
let reply = drtio::aux_transact(aux_mutex, linkno, &drtioaux_async::Packet::MonitorRequest {
|
||||
|
|
@ -78,7 +77,7 @@ mod remote_moninj {
|
|||
0
|
||||
}
|
||||
|
||||
pub async fn inject(aux_mutex: &Rc<Mutex<bool>>, timer: GlobalTimer, linkno: u8, destination: u8, channel: i32, overrd: i8, value: i8) {
|
||||
pub async fn inject(aux_mutex: &Rc<Mutex<bool>>, _timer: GlobalTimer, linkno: u8, destination: u8, channel: i32, overrd: i8, value: i8) {
|
||||
let _lock = aux_mutex.lock();
|
||||
drtioaux_async::send(linkno, &drtioaux_async::Packet::InjectionRequest {
|
||||
destination: destination,
|
||||
|
|
@ -86,9 +85,6 @@ mod remote_moninj {
|
|||
overrd: overrd as _,
|
||||
value: value as _
|
||||
}).await.unwrap();
|
||||
// give time for the satellite to process the request before releasing mutex
|
||||
let mut countdown = timer.countdown();
|
||||
delay(&mut countdown, Milliseconds(10)).await;
|
||||
}
|
||||
|
||||
pub async fn read_injection_status(aux_mutex: &Rc<Mutex<bool>>, timer: GlobalTimer, linkno: u8, destination: u8, channel: i32, overrd: i8) -> i8 {
|
||||
|
|
|
|||
|
|
@ -11,7 +11,6 @@ pub const RTIO_O_STATUS_UNDERFLOW: i32 = 2;
|
|||
pub const RTIO_O_STATUS_DESTINATION_UNREACHABLE: i32 = 4;
|
||||
pub const RTIO_I_STATUS_WAIT_EVENT: i32 = 1;
|
||||
pub const RTIO_I_STATUS_OVERFLOW: i32 = 2;
|
||||
#[allow(unused)]
|
||||
pub const RTIO_I_STATUS_WAIT_STATUS: i32 = 4; // TODO
|
||||
pub const RTIO_I_STATUS_DESTINATION_UNREACHABLE: i32 = 8;
|
||||
|
||||
|
|
|
|||
|
|
@ -20,8 +20,6 @@ extern crate alloc;
|
|||
|
||||
use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, println, mpcore, gic, stdio};
|
||||
use libsupport_zynq::ram;
|
||||
#[cfg(has_grabber)]
|
||||
use libboard_artiq::grabber;
|
||||
#[cfg(has_si5324)]
|
||||
use libboard_artiq::si5324;
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
|
|
@ -419,8 +417,6 @@ fn hardware_tick(ts: &mut u64, timer: &mut GlobalTimer) {
|
|||
if now > ts_ms {
|
||||
ts_ms = now + Milliseconds(200);
|
||||
*ts = ts_ms.0;
|
||||
#[cfg(has_grabber)]
|
||||
grabber::tick();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -487,7 +483,11 @@ pub extern fn main_core0() -> i32 {
|
|||
io_expander1
|
||||
.init(&mut i2c)
|
||||
.expect("I2C I/O expander #1 initialization failed");
|
||||
// Drive TX_DISABLE to false on SFP0..3
|
||||
// Actively drive TX_DISABLE to false on SFP0..3
|
||||
io_expander0.set_oe(&mut i2c, 0, 1 << 1).unwrap();
|
||||
io_expander1.set_oe(&mut i2c, 0, 1 << 1).unwrap();
|
||||
io_expander0.set_oe(&mut i2c, 1, 1 << 1).unwrap();
|
||||
io_expander1.set_oe(&mut i2c, 1, 1 << 1).unwrap();
|
||||
io_expander0.set(0, 1, false);
|
||||
io_expander1.set(0, 1, false);
|
||||
io_expander0.set(1, 1, false);
|
||||
|
|
@ -528,16 +528,6 @@ pub extern fn main_core0() -> i32 {
|
|||
for mut rep in repeaters.iter_mut() {
|
||||
rep.service(&routing_table, rank, &mut timer);
|
||||
}
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
{
|
||||
io_expander0
|
||||
.service(&mut i2c)
|
||||
.expect("I2C I/O expander #0 service failed");
|
||||
io_expander1
|
||||
.service(&mut i2c)
|
||||
.expect("I2C I/O expander #1 service failed");
|
||||
}
|
||||
|
||||
hardware_tick(&mut hardware_tick_ts, &mut timer);
|
||||
}
|
||||
|
||||
|
|
@ -559,15 +549,6 @@ pub extern fn main_core0() -> i32 {
|
|||
for mut rep in repeaters.iter_mut() {
|
||||
rep.service(&routing_table, rank, &mut timer);
|
||||
}
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
{
|
||||
io_expander0
|
||||
.service(&mut i2c)
|
||||
.expect("I2C I/O expander #0 service failed");
|
||||
io_expander1
|
||||
.service(&mut i2c)
|
||||
.expect("I2C I/O expander #1 service failed");
|
||||
}
|
||||
hardware_tick(&mut hardware_tick_ts, &mut timer);
|
||||
if drtiosat_tsc_loaded() {
|
||||
info!("TSC loaded from uplink");
|
||||
|
|
|
|||
Loading…
Reference in New Issue