forked from M-Labs/artiq-zynq
parent
323191b9fc
commit
05e1614313
@ -56,7 +56,7 @@ pub extern fn dma_record_start(name: CSlice<u8>) {
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}
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}
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}
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}
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pub extern fn dma_record_stop(_: i64) {
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pub extern fn dma_record_stop(duration: i64) {
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unsafe {
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unsafe {
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if RECORDER.is_none() {
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if RECORDER.is_none() {
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artiq_raise!("DMAError", "DMA is not recording")
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artiq_raise!("DMAError", "DMA is not recording")
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@ -68,8 +68,10 @@ pub extern fn dma_record_stop(_: i64) {
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library.rebind(b"rtio_output_wide",
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library.rebind(b"rtio_output_wide",
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rtio::output_wide as *const ()).unwrap();
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rtio::output_wide as *const ()).unwrap();
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let mut recorder = RECORDER.take().unwrap();
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recorder.duration = duration;
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KERNEL_CHANNEL_1TO0.lock().as_mut().unwrap().send(
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KERNEL_CHANNEL_1TO0.lock().as_mut().unwrap().send(
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Message::DmaPutRequest(RECORDER.take().unwrap())
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Message::DmaPutRequest(recorder)
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);
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);
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}
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}
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}
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}
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