morgan
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  • Joined on 2023-07-24
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morgan pushed to master at morgan/artiq-zynq 2024-04-29 14:34:16 +08:00
c261897658 rename `build` derivation to `board-package-set`
1d603c73b7 DDMTD: replace 1st edge to median edge deglitcher
61315c29b9 Si549: recalibrate TAG_OFFSET for ISERDESE2
3f57de6ec7 DDMTD: replace FD with ISERDESE2
cca23aa2a5 wrpll runtime: reduce mmcm output jitter
Compare 22 commits »
morgan pushed to DDMTD at morgan/artiq-zynq 2024-04-29 12:06:00 +08:00
11072f3aff Si549: recalibrate TAG_OFFSET for ISERDESE2
bd30de9e6e DDMTD: replace FD with ISERDESE2
Compare 2 commits »
morgan created pull request M-Labs/artiq-zynq#294 2024-04-26 17:07:31 +08:00
WRPLL runtime: reduce output jitter of mmcm
morgan created branch wrpll_mmcm_fix in morgan/artiq-zynq 2024-04-26 16:59:09 +08:00
morgan pushed to wrpll_mmcm_fix at morgan/artiq-zynq 2024-04-26 16:59:09 +08:00
a597d0b8e2 wrpll runtime: reduce mmcm output jitter
dcdad71909 SMAFreqMulti: set mmcm bw to HIGH for lower jitter
Compare 2 commits »
morgan created pull request M-Labs/artiq-zynq#293 2024-04-26 13:25:57 +08:00
DDMTD: replace first edge deglitcher with median edge deglitcher
morgan created branch deglitcher in morgan/artiq-zynq 2024-04-26 13:16:00 +08:00
morgan pushed to deglitcher at morgan/artiq-zynq 2024-04-26 13:16:00 +08:00
7b8b0d1ef0 DDMTD: replace 1st edge to median edge deglitcher
morgan created pull request M-Labs/artiq-zynq#292 2024-04-26 12:44:32 +08:00
DDMTD: replace FD with ISERDESE2
morgan pushed to DDMTD at morgan/artiq-zynq 2024-04-26 12:35:51 +08:00
86ccbf16d0 Si549: recalibrate TAG_OFFSET for ISERDESE2
974d864901 DDMTD: replace FD with ISERDESE2
Compare 2 commits »
morgan created branch DDMTD in morgan/artiq-zynq 2024-04-26 12:34:22 +08:00
morgan pushed to DDMTD at morgan/artiq-zynq 2024-04-26 12:34:22 +08:00
4f6c2e5bb5 Si549: recalibrate TAG_OFFSET for ISERDESE2
f44324ea8d DDMTD: replace FD with ISERDESE2
Compare 2 commits »
morgan commented on pull request M-Labs/artiq-zynq#282 2024-04-12 16:46:36 +08:00
Kasli-soc: add WRPLL clock recovery

Force pushed changelog

  • gateware
    • doc clenaup
    • increase blind period to 400 to improve lock stability for satman
    • si549
      • strobe now use CSR
      • the nack…
morgan pushed to WRPLL at morgan/artiq-zynq 2024-04-12 16:45:31 +08:00
14fa038118 Firmware: Runtime WRPLL
b81323af30 Firmware: Satman skew calibration & tester
291777f764 Firmware: Satman WRPLL
a1d80fb93b Firmware: Si549 and io_expander
7827c7b803 Gateware: kasli_soc WRPLL setup
Compare 6 commits »
morgan pushed to WRPLL at morgan/artiq-zynq 2024-04-09 17:34:28 +08:00
aa4bb8bae8 Firmware: Runtime WRPLL
a2e5eba767 Firmware: Satman skew calibration & tester
c4780aa608 Firmware: Satman WRPLL
e6045be0f8 Firmware: Si549 and io_expander
acbbd8d79a Gateware: kasli_soc WRPLL setup
Compare 6 commits »
morgan pushed to WRPLL at morgan/artiq-zynq 2024-04-09 17:33:39 +08:00
20732c0de1 Cal skew: use static must
611c08262f wrpll fw & tag collector: use static mut
06266eba84 wrpll gw: remove debug leftover
cf3f5dfcfa freq counter fw: fix counts formula & remove delay
7b97d30a43 freq counter gw: cleanup
Compare 20 commits »
morgan commented on pull request M-Labs/artiq-zynq#282 2024-03-26 15:56:09 +08:00
Kasli-soc: add WRPLL clock recovery

Yes, that will also save time. The select_recovered_clock(true) is called directly after [drtiosat_link_rx_up](https://git.m-labs.hk/M-Labs/artiq-zynq/src/commit/1f7c53b8d0dfab4a0194e6a860e57bb17e…

morgan commented on pull request M-Labs/artiq-zynq#282 2024-03-26 15:37:44 +08:00
Kasli-soc: add WRPLL clock recovery

it's waiting for the gtx_cdr, sometimes the cdr is not locked/stable yet and the frequency counter will read the wrong value.

morgan commented on pull request M-Labs/artiq-zynq#282 2024-03-26 15:36:39 +08:00
Kasli-soc: add WRPLL clock recovery

Yes, will change it to static mut

morgan commented on pull request M-Labs/artiq-zynq#282 2024-03-26 13:27:14 +08:00
Kasli-soc: add WRPLL clock recovery

Force push changelog

  • kasli soc
    • revert the ClockSynthesis refactor
    • add clk_synth, IBUFGDS & period constraint for master and satellite
  • Testing
    • master & standalone:…