WRPLL gatware: refactor
586fd2f17e
Gateware: remove redundant si549.py & wrpll.py
377f8779a0
kasli soc: refactor to use wrpll from artiq
1fbaacfc43
flake: update artiq
127ea9ea4d
flake: update dependencies
174c301d7d
add llvmPackages_11
Add assembly instructions for Shuttler
Use a number list and inline the code block "1.Initialize the Routing Tableartiq_route rt.bin init
"
riscv32::swap: fix stack push/pop asm
kasli soc: add rtio_frequency cfg for runtime
76c285cc87
WRPLL: add filter for DRTIO 100MHz
bfd4be3c94
WRPLL: replace PI controller with new filter
7eb9dfa2d6
WRPLL: remove anti-windup
4700d4c9ed
WRPLL: remove anti-windup
8409788158
WRPLL: replace PI controller with low pass filter
4a9de633d4
doc: add frequency sim docs
d5dd02736b
sim: add frequency simulation
bc00240aef
pkg: add control