vexriscv-rust/Cargo.toml

19 lines
462 B
TOML

[package]
name = "riscv"
version = "0.4.0"
repository = "https://github.com/rust-embedded/riscv"
authors = [
"The RISC-V Team <risc-v@teams.rust-embedded.org>",
"David Craven <david@craven.ch>",
]
categories = ["embedded", "hardware-support", "no-std"]
description = "Low level access to RISC-V processors"
keywords = ["riscv", "register", "peripheral"]
license = "ISC"
[dependencies]
bare-metal = "0.2.0"
bit_field = "0.9.0"
[features]
inline-asm = []