register: add vexriscv-specific registers

Vexriscv in its normal configuration has its own registers for things
such as machine interrupts and system interrupts.  Add wrappers for
these registers.

Signed-off-by: Sean Cross <sean@xobs.io>

src/register/mod.rs

@@ -107,3 +107,10 @@ pub use self::mhpmeventx::*;
 
 
 // TODO: Debug Mode Registers
+
+// Vexriscv Registers
+pub mod vdci;
+pub mod vmim;
+pub mod vmip;
+pub mod vsim;
+pub mod vsip;

src/register/vdci.rs

@@ -0,0 +1,4 @@
+//! uscratch register
+
+read_csr_as_usize!(0xCC0, __read_vdci);
+write_csr_as_usize!(0xCC0, __write_vdci);

src/register/vmim.rs

@@ -0,0 +1,4 @@
+//! uscratch register
+
+read_csr_as_usize!(0xBC0, __read_vmim);
+write_csr_as_usize!(0xBC0, __write_vmim);

src/register/vmip.rs

@@ -0,0 +1,4 @@
+//! uscratch register
+
+read_csr_as_usize!(0xFC0, __read_vmip);
+write_csr_as_usize!(0xFC0, __write_vmip);

src/register/vsim.rs

@@ -0,0 +1,4 @@
+//! uscratch register
+
+read_csr_as_usize!(0x9C0, __read_vsim);
+write_csr_as_usize!(0x9C0, __write_vsim);

src/register/vsip.rs

@@ -0,0 +1,4 @@
+//! uscratch register
+
+read_csr_as_usize!(0xDC0, __read_vsip);
+write_csr_as_usize!(0xDC0, __write_vsip);