diff --git a/src/register/fcsr.rs b/src/register/fcsr.rs
index a6b2b13..ba204ff 100644
--- a/src/register/fcsr.rs
+++ b/src/register/fcsr.rs
@@ -64,6 +64,7 @@ impl Flags {
 }
 
 /// Rounding Mode
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum RoundingMode {
     RoundToNearestEven = 0b000,
     RoundTowardsZero = 0b001,
diff --git a/src/register/mcause.rs b/src/register/mcause.rs
index 67e6d8c..e0e6ffb 100644
--- a/src/register/mcause.rs
+++ b/src/register/mcause.rs
@@ -7,14 +7,14 @@ pub struct Mcause {
 }
 
 /// Trap Cause
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum Trap {
     Interrupt(Interrupt),
     Exception(Exception),
 }
 
 /// Interrupt
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum Interrupt {
     UserSoft,
     SupervisorSoft,
@@ -29,7 +29,7 @@ pub enum Interrupt {
 }
 
 /// Exception
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
 pub enum Exception {
     InstructionMisaligned,
     InstructionFault,
diff --git a/src/register/misa.rs b/src/register/misa.rs
index 44ae950..792e22c 100644
--- a/src/register/misa.rs
+++ b/src/register/misa.rs
@@ -9,6 +9,7 @@ pub struct Misa {
 }
 
 /// Machine XLEN
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum MXL {
     XLEN32,
     XLEN64,
diff --git a/src/register/mstatus.rs b/src/register/mstatus.rs
index 3988097..9693918 100644
--- a/src/register/mstatus.rs
+++ b/src/register/mstatus.rs
@@ -10,6 +10,7 @@ pub struct Mstatus {
 }
 
 /// Additional extension state
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum XS {
     /// All off
     AllOff = 0,
@@ -25,6 +26,7 @@ pub enum XS {
 }
 
 /// Floating-point extension state
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum FS {
     Off = 0,
     Initial = 1,
@@ -33,6 +35,7 @@ pub enum FS {
 }
 
 /// Machine Previous Privilege Mode
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum MPP {
     Machine = 3,
     Supervisor = 1,
@@ -40,6 +43,7 @@ pub enum MPP {
 }
 
 /// Supervisor Previous Privilege Mode
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum SPP {
     Supervisor = 1,
     User = 0,
diff --git a/src/register/mtvec.rs b/src/register/mtvec.rs
index d4f8c07..247e05f 100644
--- a/src/register/mtvec.rs
+++ b/src/register/mtvec.rs
@@ -7,6 +7,7 @@ pub struct Mtvec {
 }
 
 /// Trap mode
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum TrapMode {
     Direct = 0,
     Vectored = 1,
diff --git a/src/register/satp.rs b/src/register/satp.rs
index fa0c6ee..ffd347c 100644
--- a/src/register/satp.rs
+++ b/src/register/satp.rs
@@ -70,12 +70,14 @@ impl Satp {
 }
 
 #[cfg(riscv32)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Mode {
     Bare = 0,
     Sv32 = 1,
 }
 
 #[cfg(riscv64)]
+#[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Mode {
     Bare = 0,
     Sv39 = 8,
diff --git a/src/register/scause.rs b/src/register/scause.rs
index 596ccef..0172f07 100644
--- a/src/register/scause.rs
+++ b/src/register/scause.rs
@@ -10,14 +10,14 @@ pub struct Scause {
 }
 
 /// Trap Cause
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum Trap {
     Interrupt(Interrupt),
     Exception(Exception),
 }
 
 /// Interrupt
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum Interrupt {
     UserSoft,
     SupervisorSoft,
@@ -29,7 +29,7 @@ pub enum Interrupt {
 }
 
 /// Exception
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum Exception {
     InstructionMisaligned,
     InstructionFault,
diff --git a/src/register/sstatus.rs b/src/register/sstatus.rs
index ec4765a..550aaf2 100644
--- a/src/register/sstatus.rs
+++ b/src/register/sstatus.rs
@@ -10,14 +10,14 @@ pub struct Sstatus {
 }
 
 /// Supervisor Previous Privilege Mode
-#[derive(Eq, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum SPP {
     Supervisor = 1,
     User = 0,
 }
 
 /// Floating-point unit Status
-#[derive(Eq, PartialEq)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum FS {
     Off = 0,
     Initial = 1,
diff --git a/src/register/stvec.rs b/src/register/stvec.rs
index 5a179d0..aab918b 100644
--- a/src/register/stvec.rs
+++ b/src/register/stvec.rs
@@ -7,6 +7,7 @@ pub struct Stvec {
 }
 
 /// Trap mode
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]
 pub enum TrapMode {
     Direct = 0,
     Vectored = 1,