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vexriscv-rust
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ucause only as readable bits

This commit is contained in:
Ales Katona 2019-08-31 17:32:43 -06:00
parent e1232ed680
commit 8840aee369
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GPG Key ID: 08C459E2D8ABB7E8
1 changed files with 0 additions and 43 deletions
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43
src/register/ucause.rs
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@ -1,7 +1,5 @@
//! ucause register
pub use crate::register::mcause::{Interrupt, Exception, Trap};
/// ucause register
#[derive(Clone, Copy, Debug)]
pub struct Ucause {
@ -14,47 +12,6 @@ impl Ucause {
pub fn bits(&self) -> usize {
self.bits
}
/// Returns the code field
pub fn code(&self) -> usize {
match () {
#[cfg(target_pointer_width = "32")]
() => self.bits & !(1 << 31),
#[cfg(target_pointer_width = "64")]
() => self.bits & !(1 << 63),
#[cfg(target_pointer_width = "128")]
() => self.bits & !(1 << 127),
}
}
/// Trap Cause
#[inline]
pub fn cause(&self) -> Trap {
if self.is_interrupt() {
Trap::Interrupt(Interrupt::from(self.code()))
} else {
Trap::Exception(Exception::from(self.code()))
}
}
/// Is trap cause an interrupt.
#[inline]
pub fn is_interrupt(&self) -> bool {
match () {
#[cfg(target_pointer_width = "32")]
() => self.bits & (1 << 31) == 1 << 31,
#[cfg(target_pointer_width = "64")]
() => self.bits & (1 << 63) == 1 << 63,
#[cfg(target_pointer_width = "128")]
() => self.bits & (1 << 127) == 1 << 127,
}
}
/// Is trap cause an exception.
#[inline]
pub fn is_exception(&self) -> bool {
!self.is_interrupt()
}
}
read_csr_as!(Ucause, 0x042, __read_ucause);