Fix docs
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src/lib.rs
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src/lib.rs
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//! Low level access to RISC-V processors
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//!
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//! # Minimum Supported Rust Version (MSRV)
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//!
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//! This crate is guaranteed to compile on stable Rust 1.30 and up. It *might*
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//! compile with older versions but that may change in any new patch release.
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//! Note that `riscv64imac-unknown-none-elf` and `riscv64gc-unknown-none-elf` targets
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//! are not supported on stable yet.
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//!
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//! # Features
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//!
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//! This crate provides:
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//!
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//! - Access to core registers like `mstatus` or `mcause`.
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//! - Interrupt manipulation mechanisms.
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//! - Wrappers around assembly instructions like `WFI`.
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//! Low level access to VexRiscv RISC-V cores
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#![no_std]
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#![cfg_attr(feature = "inline-asm", feature(asm))]
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