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Fix docs

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Vadim Kaushan 2020-06-14 14:39:24 +03:00
parent 426fc067b4
commit 707f51f46e
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1 changed files with 1 additions and 16 deletions
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src/lib.rs
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@ -1,19 +1,4 @@
//! Low level access to RISC-V processors //! Low level access to VexRiscv RISC-V cores
//!
//! # Minimum Supported Rust Version (MSRV)
//!
//! This crate is guaranteed to compile on stable Rust 1.30 and up. It *might*
//! compile with older versions but that may change in any new patch release.
//! Note that `riscv64imac-unknown-none-elf` and `riscv64gc-unknown-none-elf` targets
//! are not supported on stable yet.
//!
//! # Features
//!
//! This crate provides:
//!
//! - Access to core registers like `mstatus` or `mcause`.
//! - Interrupt manipulation mechanisms.
//! - Wrappers around assembly instructions like `WFI`.
#![no_std] #![no_std]
#![cfg_attr(feature = "inline-asm", feature(asm))] #![cfg_attr(feature = "inline-asm", feature(asm))]