From 5846f57ab16896048fadf6b30edf708ef608c8d5 Mon Sep 17 00:00:00 2001
From: Sean Cross <sean@xobs.io>
Date: Wed, 8 Jan 2020 17:23:05 +0800
Subject: [PATCH] cargo: bump version to 0.0.2

This version adds vexriscv-specific registers.

Signed-off-by: Sean Cross <sean@xobs.io>
---
 Cargo.toml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Cargo.toml b/Cargo.toml
index 3ad4005..12ed2b2 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "vexriscv"
-version = "0.0.1"
+version = "0.0.2"
 repository = "https://github.com/xobs/vexriscv-rust"
 authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
 categories = ["embedded", "hardware-support", "no-std"]