diff --git a/Cargo.toml b/Cargo.toml
index 2ebf0f6..eb140a5 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "riscv"
-version = "0.5.1"
+version = "0.5.2"
 repository = "https://github.com/rust-embedded/riscv"
 authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
 categories = ["embedded", "hardware-support", "no-std"]
diff --git a/src/register/misa.rs b/src/register/misa.rs
index bd52508..44ae950 100644
--- a/src/register/misa.rs
+++ b/src/register/misa.rs
@@ -43,7 +43,7 @@ impl Misa {
         if bit > 25 {
             return false;
         }
-        self.bits() & (1 >> bit) == (1 >> bit)
+        self.bits() & (1 << bit) == (1 << bit)
     }
 }