diff --git a/src/register/scause.rs b/src/register/scause.rs
index b0a3e40..1048602 100644
--- a/src/register/scause.rs
+++ b/src/register/scause.rs
@@ -3,14 +3,82 @@
 use bit_field::BitField;
 use core::mem::size_of;
 
-pub use crate::register::mcause::{Interrupt, Exception, Trap};
-
 /// scause register
 #[derive(Clone, Copy)]
 pub struct Scause {
     bits: usize,
 }
 
+/// Trap Cause	
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]	
+pub enum Trap {	
+    Interrupt(Interrupt),	
+    Exception(Exception),	
+}	
+
+/// Interrupt	
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]	
+pub enum Interrupt {	
+    UserSoft,	
+    SupervisorSoft,	
+    UserTimer,	
+    SupervisorTimer,	
+    UserExternal,	
+    SupervisorExternal,	
+    Unknown,	
+}	
+
+/// Exception	
+#[derive(Copy, Clone, Debug, Eq, PartialEq)]	
+pub enum Exception {	
+    InstructionMisaligned,	
+    InstructionFault,	
+    IllegalInstruction,	
+    Breakpoint,	
+    LoadFault,	
+    StoreMisaligned,	
+    StoreFault,	
+    UserEnvCall,	
+    InstructionPageFault,	
+    LoadPageFault,	
+    StorePageFault,	
+    Unknown,	
+}	
+
+impl Interrupt {	
+    pub fn from(nr: usize) -> Self {	
+        match nr {	
+            0 => Interrupt::UserSoft,	
+            1 => Interrupt::SupervisorSoft,	
+            4 => Interrupt::UserTimer,	
+            5 => Interrupt::SupervisorTimer,	
+            8 => Interrupt::UserExternal,	
+            9 => Interrupt::SupervisorExternal,	
+            _ => Interrupt::Unknown,	
+        }	
+    }	
+}	
+
+
+impl Exception {	
+    pub fn from(nr: usize) -> Self {	
+        match nr {	
+            0 => Exception::InstructionMisaligned,	
+            1 => Exception::InstructionFault,	
+            2 => Exception::IllegalInstruction,	
+            3 => Exception::Breakpoint,	
+            5 => Exception::LoadFault,	
+            6 => Exception::StoreMisaligned,	
+            7 => Exception::StoreFault,	
+            8 => Exception::UserEnvCall,	
+            12 => Exception::InstructionPageFault,	
+            13 => Exception::LoadPageFault,	
+            15 => Exception::StorePageFault,	
+            _ => Exception::Unknown,	
+        }	
+    }	
+}
+
 impl Scause {
     /// Returns the contents of the register as raw bits
     #[inline]