efc: add link recal section

This commit is contained in:
2025-10-27 13:10:00 +08:00
parent 40b7958431
commit b8a9763cc3

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@@ -81,6 +81,15 @@ Kasli Satellite(SFP0)(DEST0). EFC is connected to Kasli Satellite with DRTIO ove
When you are building a crate with EFC(s), you should erase the flash/SD card config on both the EFC and
Kasli/Kasli-SoC. Always flash the EFC Board first before flashing the Kasli/Kasli-SoC.
Use the Digilent HS2 JTAG adapter connected to the JTAG port on the EFC, located next to the barrel jack.
To flash the gateware and firmware onto the EFC board,
```shell
artiq_flash --srcbuild -t [efc1v0, efc1v1] -d artiq_efc/EFC
```
## Link recalibration
If either of the following elements is changed, you will need to **ERASE** the stored calibrated values on both
the EFC and Kasli Master, or the communication between the boards cannot be established:
@@ -90,19 +99,12 @@ the EFC and Kasli Master, or the communication between the boards cannot be esta
4. Kasli/Kasli-SoC Master Gateware
5. EFC Board/Kasli/Kasli-SoC PCB
Use the Digilent HS2 JTAG adapter connected to the JTAG port on the EFC, located next to the barrel jack.
To recalibrate the link delay, erase the calibrated value on all cards in the same power cycle:
To erase the flash on the EFC board,
- EFC: connect the JTAG port and run `artiq_flash erase=storage -t efc`
- Kasli: connect the USB port and run `artiq_flash erase=storage -t kasli`
- Kasli-SoC: remove `eem_drtio_delay{n}` line in the SD card `Config` file
```shell
artiq_flash -t efc erase
```
To flash the gateware and firmware onto the EFC board, ,
```shell
artiq_flash --srcbuild -t [efc1v0, efc1v1] -d artiq_efc/EFC
```
## UART log access