forked from M-Labs/artiq-zynq
90 lines
2.7 KiB
Markdown
90 lines
2.7 KiB
Markdown
# CXP
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## Finished
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- Upconn - Low speed serial
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[x] Low speed serial PHY
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[x] 20.833Mbps & 41.666Mbps change
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[x] 8b10b encoder
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[x] TX Pipeline with priority transmission
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[x] Trigger
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[x] Trigger ack
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[x] Test & Ctrl packet with DMA
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[x] CTRL Packet serialize firmware
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[x] follow DRTIO DMA
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[x] check crc
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- Downconn - GTX
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[x] GTX serial PHY
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[x] QPLL & GTX DRP to config linerate
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[x] Comma checker & restart rx
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[x] RX Pipeline with priority decoder
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[x] Trigger ack
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[x] CTRL packet DMA with extra buffer
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[x] Connection test sequence checker
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[x] CTRL Packet deserialize firmware
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[x] follow DRTIO DMA
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[x] check crc
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[x] GTX Multilane setup
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[x] add tx/rx mode for gtx
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- Camera boostrap
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[x] get the CXP version
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[x] test connection
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[x] discovery other extension (links)
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[x] set bitrate
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- Camera frame pipeline
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[x] CXP frame packet routing (maybe no need to routing non zero streaming id (we have ROI buildin anyways)?)
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[x] CXP CRC32 detection
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[x] Region of interest engine (32 bits mode)
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[x] pixel gearbox
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[x] pixel parser (xy pos)
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[x] Test out CXP trigger
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[x] 8, 10, 12 bits in white test image mode
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## TODO
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[] remove ALL debug tools
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[] flake.nix mod
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[] local_run.sh mod
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### Gateware
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[x] refactor error_cnt
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[x] Heartbeat (is it useful?? lol)
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[x] rename circular buffer to slots
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[x] use `from misoc.interconnect.stream import Endpoint` instead
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[x] add __init__.py for cxp??
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[] Try to fix tight s/h time pins
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[] remove self.source.ack in fsm
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- seems to kill timing :V
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[] multilane ROI
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[] Region of interest engine (n*32 bits mode)
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[] bus widener + fifo
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[] remove pmod/debug_sma in fns args
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[] rtio to getting the frame
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- O: trigger
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- I: frame
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### Firmware (design with driver)
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[x] API programming
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[x] add tag handling for api calls
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- support lane reset in kernel using syscall
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[] double check cfg gating
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[] add libboard_artiq/src/lib.rs cfg gating
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[] Camera auto linkup/linkdown using threads
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[] Camera linkdown detection
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[] add mutex support for tx/rx camera programming (or block them when camera is not ready)
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[] add xml url printout in uart (so user can just download the xml using api)
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[] add heartbeat checking
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[] add flashing LED (non-essential)
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[] add PoCXP (non-essential)
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### Coredevice Driver
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[x] use camera test pattern black/white to verify roi https://docs.baslerweb.com/test-patterns
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[x] test out 8/10/12 bit mode
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[] support simple camera programming interface (Not real time)
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- basic i2c-like interface with read/write u32
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[] add grabber like fns & docs
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### PR
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1. push the gtx init fix
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2. push the cxp core to misoc
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3. push the cxp rtio core to artiq-zynq & artiq
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