from migen import *
from misoc.interconnect.csr import *
from misoc.interconnect import stream

from src.gateware.cxp_router import *

class DUT(Module):
    def __init__(self):
        self.submodules.gearbox = gearbox = Stream_Packet_Gearbox()
        self.sink, self.source = gearbox.sink, gearbox.source

        self.comb += self.source.ack.eq(1)


dut = DUT()


def packet_sim(packets=[]):
    print("=================TEST========================")
    sink = dut.sink
    source = dut.source

    for i, p in enumerate(packets):
        yield sink.data.eq(p["data"])
        yield sink.k.eq(p["k"])

        if "stb_break" in p:
            yield sink.stb.eq(0)
        else:
            yield sink.stb.eq(1)

        if "eop" in p:
            yield sink.eop.eq(1)
        else:
            yield sink.eop.eq(0)
        yield

    for _ in range(10):
        yield sink.data.eq(0)
        yield sink.k.eq(0)
        yield sink.stb.eq(0)
        yield sink.eop.eq(0)

        yield source.ack.eq(1)
        yield

    assert True


def testbench():
    paks = [
        {"data": C(0x7C7C7C7C, word_width), "k" : Replicate(1, 4)}, 
        {"data": C(0x01010101, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, # stream id
        {"data": C(0x00000001, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x6AEFACF6, word_width), "k" : Replicate(0, 4), "eop":0}, # crc

        {"data": C(0, word_width), "k" : Replicate(0, 4), "stb_break":0}, # cyc break

        {"data": C(0x02020202, word_width), "k" : Replicate(0, 4)},  
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, # Xsize[23:16]
        {"data": C(0x09090909, word_width), "k" : Replicate(0, 4)}, # Xsize[15:8] 
        {"data": C(0x90909090, word_width), "k" : Replicate(0, 4)}, # Xsize[7:0] 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x8EE1DAA1, word_width), "k" : Replicate(0, 4), "eop":0}, # crc

        {"data": C(0, word_width), "k" : Replicate(0, 4), "stb_break":0}, # cyc break

        {"data": C(0x08080808, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x08080808, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, # DsizeL[23:16] 
        {"data": C(0x02020202, word_width), "k" : Replicate(0, 4)}, # DsizeL[15:8] 
        {"data": C(0x64646464, word_width), "k" : Replicate(0, 4)}, # DsizeL[7:0] 
        {"data": C(0x01010101, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x01010101, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x00000000, word_width), "k" : Replicate(0, 4)}, 
        {"data": C(0x51C243EA, word_width), "k" : Replicate(0, 4), "eop":0}, # crc

    ]

    
    yield from packet_sim(paks)

run_simulation(dut, testbench(), vcd_name="sim-cxp.vcd")