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artiq-zynq
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Code Pull Requests Activity
792 Commits 16 Branches 0 Tags 4.2 MiB
Commit Graph

536 Commits

Author SHA1 Message Date
morgan 8ba7793b24 cxp upconn: fix word count issue 2024-06-28 12:46:35 +08:00
morgan 481162430c cxp upconn: add word & char boundary transmission 2024-06-28 12:02:15 +08:00
morgan 4eed5e99f4 cxp upconn: put encoder with tx_fifos 2024-06-27 16:50:15 +08:00
morgan 98f4d4cea4 cxp upconn: refactor fifo into submodule 2024-06-27 12:51:20 +08:00
morgan 14a9184fee cxp upcxp: add tx_enable & startup sequence 2024-06-25 15:29:18 +08:00
morgan ae4bfc40e5 cxp upconn: add priority packet 2024-06-24 14:59:49 +08:00
morgan cdc7294e99 cxp upconn: add sys_clk_freq parameter to set pll 2024-06-20 16:20:27 +08:00
morgan e6550c68cf cxp upconn: add sink to txphy & cleanup 2024-06-20 15:57:37 +08:00
morgan 00e5d32d45 cxp upconn: add priority lv1 fifo & refactor 2024-06-20 14:56:28 +08:00
morgan 779084d5dc cxp upconn: setup fifo 2024-06-20 10:57:05 +08:00
morgan f43c8b8bac cxp upconn: rename bits to tx_bitcount 2024-06-18 16:42:17 +08:00
morgan 6636339701 cxp upconn: refactor serial fsm as sync logic 2024-06-18 16:40:40 +08:00
morgan bd66659883 cxp upconn: write state fsm refactor 2024-06-18 15:58:53 +08:00
morgan 4de58e0d52 cxp upconn: use singlencoder & fix disparity bug 2024-06-18 14:40:58 +08:00
morgan 7c60fb5776 cxp upconn: init encoder 2024-06-18 12:26:10 +08:00
morgan bbf9e37867 cxp upconn: rename high speed upconn to bitrate2x 2024-06-18 12:24:31 +08:00
morgan d36afd6f7b CXP upconn: add sys reset signal to pll 2024-06-17 16:51:55 +08:00
morgan cb1ec7f62a CXP upconn: remove unused code 2024-06-17 14:46:49 +08:00
morgan 48d3a9cd4a CXP up connection gw: init 2024-06-17 13:19:37 +08:00
morgan 96a052513d zc706: use new CXP file name 2024-06-14 17:18:26 +08:00
morgan b2c6c20426 cxp: refactor to its separte module 2024-06-14 17:17:56 +08:00
morgan 5fcf5cb70f cxp gtx: rename to cxp_downconn 2024-06-14 17:17:16 +08:00
morgan 47e1a83519 cxp fmc: rename file 2024-06-14 17:16:51 +08:00
morgan d592825284 CXP gtx: rename to CXP DownConn 2024-06-14 17:07:58 +08:00
morgan b52589bd5f CXP CLK alignment: clock domain naming refactor 2024-06-13 16:56:36 +08:00
morgan 9c69167f7f CXP gtx: Clock domain naming refactor and remove cxp_gtx 2024-06-13 16:56:16 +08:00
morgan 8ac71b37a9 CXP GTX: init 2024-06-12 14:50:38 +08:00
morgan ce0e14879c Gateware: ZC706 CXP GTX setup 2024-06-05 13:02:52 +08:00
morgan df7feb3b17 Gateware: CXP_GTX init 2024-06-05 13:02:52 +08:00
morgan f5c604bbb5 zc706: add USER LED to allow compilation 2024-06-05 13:02:29 +08:00
morgan d61d7a5a95 zc706: add CXP FMC variant 2024-06-05 13:02:29 +08:00
morgan 681d7400c7 FMCIO: add cxp_4r adepter io 2024-06-05 13:02:29 +08:00
morgan 586fd2f17e Gateware: remove redundant si549.py & wrpll.py 2024-05-30 15:27:16 +08:00
morgan 377f8779a0 kasli soc: refactor to use wrpll from artiq 2024-05-30 15:25:33 +08:00
mwojcik 2b2ebb5354 aux: increase max payload size 2024-05-20 15:20:06 +08:00
morgan 35ea0ed2ca WRPLL: add filter for DRTIO 100MHz 2024-05-08 18:50:55 +08:00
morgan cdf4ff24c0 WRPLL: replace PI controller with new filter 2024-05-08 18:50:55 +08:00
morgan 285b02c4b1 WRPLL: remove anti-windup 2024-05-08 18:50:55 +08:00
morgan 53cb592d19 kasli soc: add rtio_frequency cfg for runtime 2024-05-08 16:14:56 +08:00
morgan 1d603c73b7 DDMTD: replace 1st edge to median edge deglitcher 2024-04-29 13:05:02 +08:00
morgan 61315c29b9 Si549: recalibrate TAG_OFFSET for ISERDESE2 2024-04-29 13:03:30 +08:00
morgan 3f57de6ec7 DDMTD: replace FD with ISERDESE2 2024-04-29 13:03:30 +08:00
morgan cca23aa2a5 wrpll runtime: reduce mmcm output jitter 
rtio_clocking: update mmcm setting to use HIGH bandwidth
 2024-04-29 11:20:50 +08:00
morgan 2bbaea3ad5 SMAFreqMulti: set mmcm bw to HIGH for lower jitter 2024-04-29 11:20:50 +08:00
mwojcik 0a19f8fb89 satman: revert async flag changes 2024-04-26 11:37:14 +08:00
mwojcik a30c7d1f3a runtime: drtio aux refactoring, revert async flag 2024-04-26 11:37:14 +08:00
mwojcik 2d10503c20 libboard_artiq: support multiple aux rx buffers 2024-04-24 17:12:57 +08:00
mwojcik 92a29051f7 drtio_aux_controller: support aux_buffer_count 2024-04-24 17:12:39 +08:00
morgan 14fa038118 Firmware: Runtime WRPLL 
runtime: drive CLK_SEL to true when si549 is used
runtime & libboard_artiq: allow standalone to use io_expander
si549: add bit bang mmcm dynamic configuration
si549: add frequency counter for refclk
rtio_clocking & si549: add 125Mhz wrpll refclk setup
 2024-04-12 16:38:46 +08:00
morgan b81323af30 Firmware: Satman skew calibration & tester 
cargo template: add calibrate_wrpll_skew feature
tag collector: add TAG_OFFSET for Satman WRPLL
tag collector: add TAG_OFFSET getter & setter for calibration
wrpll: add skew tester and calibration
wrpll: gate calibration behind calibrate_wrpll_skew feature
 2024-04-12 16:38:46 +08:00