0d04a3400c
cxp GW: remove unused memorywe
2025-01-14 15:03:05 +08:00
7c3dd23e15
pipeline GW: remove unused autocsr
2025-01-14 15:02:54 +08:00
e466599810
cxp GW: fix compilation err
2025-01-14 14:55:29 +08:00
271cbd8e49
pipeline GW: rename modules
2025-01-14 14:54:30 +08:00
f87e498994
zc706: update naming
2025-01-14 14:21:43 +08:00
473894671a
cxp GW: rename upconn/downconn to tx/rx
2025-01-14 14:21:30 +08:00
844f2dab70
zc706 GW: fix compilation err
2025-01-14 13:04:26 +08:00
ec84a332c7
cxp GW: rname to rxphys
2025-01-14 13:04:12 +08:00
034588ec59
downconn GW: rename to RXPHYs
2025-01-14 13:04:04 +08:00
5ef521f0f6
upconn GW: remove debug buf
2025-01-14 12:41:29 +08:00
52bea11e25
zc706 GW: update fn args
2025-01-14 12:18:16 +08:00
a5d5471734
cxp GW: refactor to combine rx/tx into phy
2025-01-14 12:18:06 +08:00
7af9cc2d02
upconn GW: improve var/fn naming
2025-01-14 12:17:39 +08:00
3ca9c12c50
frameline GW: remove router
2025-01-14 11:37:58 +08:00
62fa023efc
cxp GW: move router pipeline to frame pipeline
2025-01-14 11:37:22 +08:00
ef9d633e9b
frameline GW: add reg for arbiter & broadcaster
2025-01-14 11:36:59 +08:00
26d940fbc3
frameline GW: remove eop marker
2025-01-14 10:46:01 +08:00
7ea3d563e6
cxp pipeline GW: add eop marker
2025-01-14 10:45:34 +08:00
ca3f6e4bba
cxp GW: add eop marker at rx pipeline
2025-01-14 10:45:13 +08:00
e0986e524d
frameline GW: add pixel format handling
2025-01-13 16:25:34 +08:00
6a39f475e9
frameline GW: remove old pixel gearbox
2025-01-13 15:48:47 +08:00
13b68b1e7d
frameline GW: add gearbox docs
2025-01-13 15:47:49 +08:00
d53a393f0d
frameline GW: add 14bit gearbox support
2025-01-13 13:25:03 +08:00
1006315b31
frameline GW: add 12 bits gearbox suport
2025-01-13 11:54:36 +08:00
1a24dbcdff
frameline GW: fix gearbox on 10bits
2025-01-13 11:50:44 +08:00
d509d4e606
cxp GW: pipeine update docs
2025-01-13 10:39:29 +08:00
3c93ff219e
cxp GW: add back rx debug buffer
2025-01-10 16:47:23 +08:00
7be1378310
frameline GW: cleanup gearbox
2025-01-10 13:11:29 +08:00
11925a3356
frameline GW: add buffer to improve timinig
2025-01-10 13:10:01 +08:00
f70f4ad93a
cxp GW: add cdr for roi pipeline
2025-01-10 12:55:12 +08:00
050b4a1d97
frameline GW: add gearbox proto
2025-01-10 12:48:15 +08:00
c5760a5528
pipeline GW: clean up buffer
2025-01-09 15:57:04 +08:00
4b6f3eaa06
cxp GW: rename to cxp frame pipeline
...
cxp GW: use roi pipeline
cxp GW: add register for cnt to imprve timinig
2025-01-09 15:56:10 +08:00
57852cb3a1
zc706: add CXP_DEMO variant
...
zc706: add fmc pads
zc706: add constraint to fix comma alignment & setup/hold time issue
zc706: add csr & mem group for cxp
zc706: add CXP to rtio_channel
zc706: add frame buffer pipeline
2025-01-09 15:56:10 +08:00
0054075089
cxp: add PHY and pipeline
...
testing: add loopback tx for rx testing
testing: add trigger, trigger ack for testing
cxp: add upconn & downconn phy
cxp: add upconn & downconn pipeline
cxp: add rtlink
cxp: add test packet & error counter CSR
cxp: fix ch1 rx mem cannot be read
cxp: add frame buffer to use KiB instead of KB
2025-01-09 15:56:10 +08:00
9aefdc569d
cxp frame pipeline: frame handling pipeline
...
pipeline: add eop marker, cxp_crc32 checker
frame: add stream crossbar, double buffer, parser
frame: add metadata parser, frame extractor
frame: add stream arbiter, crc checker & broadcaster
frame: add custom pixel gearbox 32:8*4
2025-01-09 15:56:10 +08:00
4cd10ef7be
cxp pipeline: packet handling pipeline
...
tx pipeline: add CRC32 inserter
tx pipeline: add start & end of packet code inserter
tx pipeline: add packet wrapper for start & stop packet indication
tx pipeline: add code source for trigger & trigger ack packet
tx pipeline: add packet for trigger & trigger ack
tx pipeline: add test packet generator
tx pipeline: add tx_command_packet for firmware
tx command packet: add dma to store control packet
rx pipeline: add reciever path
rx pipeline: add duplicate char decoder
rx pipeline: add trig ack checker
rx pipeline: add packet decoder
decoder: add test packet checher
decoder: add packet DMA
2025-01-09 15:56:10 +08:00
90864a12b7
cxp upconn gw: add low speed serial PHY
...
testing: add debug fifo output b4 encoder
cxp upconn: add low speed serial
cxp upconn: add reset, tx_busy, tx_enable
cxp upconn: add clockgen module for 20.83Mbps & 41.66Mbps using counters
cxp upconn: add oserdes using CEInserter
cxp upconn gw: remove unused debug pad
2024-12-12 11:49:54 +08:00
2ea2b5e922
cxp downconn gw: add gtx up to 12.5Gbps
...
testing: add txusrclk mmcm & loopback mode
testing: add debug output
testing: send comma in the middle of long packet to maintain lock
downconn: don't put IDLE into fifo
downconn: add GTX and QPLL support
downconn: add DRP for GTX and QPLL to support all CXP linerates
GTX: add gtx with mmcm for TXUSRCLK freq requirement
GTX: add loopback mode parameter for testing
GTX: add gtx with 40bits internal width
GTX: use built-in comma aligner
GTX: add comma checker to ensure comma is aligner on highest linerate
GTX: set QPLL as CLK source for GTX
GTX: add multilane rx support with the same rx reseter
2024-12-12 11:49:54 +08:00
70e994ce3b
fmc: add cxp_4r_fmc adepter io
2024-12-04 16:08:47 +08:00
c9d7d47c91
temp diagrams & unused sim
2024-12-04 16:08:47 +08:00
d79bf8d54a
gateware: Add default TTLs to EBAZ4205 ( #335 )
...
Co-authored-by: newell <newell.jensen@gmail.com>
Co-committed-by: newell <newell.jensen@gmail.com>
2024-11-16 10:40:45 +08:00
a410c40b50
ADD SPI to EBAZ4205 for AD9834 ( #331 )
...
Co-authored-by: newell <newell.jensen@gmail.com>
Co-committed-by: newell <newell.jensen@gmail.com>
2024-10-17 15:06:11 +08:00
61df939c87
ebaz4205: add variant and hydra job
...
Co-authored-by: newell <newell.jensen@gmail.com>
Co-committed-by: newell <newell.jensen@gmail.com>
2024-10-08 11:35:31 +08:00
81790257a5
Add ebaz4205 support ( #327 )
...
Co-authored-by: newell <newell.jensen@gmail.com>
Co-committed-by: newell <newell.jensen@gmail.com>
2024-10-05 15:05:49 +08:00
23857eef63
allow toggling SED spread with flash config key
2024-07-09 18:11:20 +08:00
586fd2f17e
Gateware: remove redundant si549.py & wrpll.py
2024-05-30 15:27:16 +08:00
377f8779a0
kasli soc: refactor to use wrpll from artiq
2024-05-30 15:25:33 +08:00
53cb592d19
kasli soc: add rtio_frequency cfg for runtime
2024-05-08 16:14:56 +08:00
1d603c73b7
DDMTD: replace 1st edge to median edge deglitcher
2024-04-29 13:05:02 +08:00
