diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py
index 17f1adb..634fac7 100755
--- a/src/gateware/zc706.py
+++ b/src/gateware/zc706.py
@@ -695,6 +695,11 @@ class CXP_FMC():
         )
         self.csr_devices.append("cxp")
 
+        # max freq of cxp_gtx_rx = linerate/internal_datawidth = 12.5Gbps/40 = 312.5MHz
+        platform.add_period_constraint(self.cxp.downconn.gtx.cd_cxp_gtx_tx.clk, 3.2)
+        platform.add_period_constraint(self.cxp.downconn.gtx.cd_cxp_gtx_rx.clk, 3.2)
+        platform.add_false_path_constraints(self.cxp.downconn.gtx.cd_cxp_gtx_tx.clk, self.cxp.downconn.gtx.cd_cxp_gtx_rx.clk)
+
         rtio_channels = []
         # FIXME remove this placeholder RTIO channel
         # There are too few RTIO channels and cannot be compiled (adr width issue of the lane distributor)