diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py
index 4c26c35..64ce081 100755
--- a/src/gateware/zc706.py
+++ b/src/gateware/zc706.py
@@ -26,7 +26,7 @@ import acpki
 import drtio_aux_controller
 import zynq_clocking
 import cxp_4r_fmc
-import cxp, cxp_frame_pipeline
+import cxp
 from config import write_csr_file, write_mem_file, write_rustc_cfg_file
 
 class SMAClkinForward(Module):
@@ -707,7 +707,7 @@ class CXP_FMC():
         rtio_channels = []
         cxp_csr_group = []
         cxp_mem_group = []
-        cxp_downconns = []
+        cxp_rx_pipelines = []
         for i, phy in enumerate(cxp_phys.phys):
             cxp_name = "cxp" + str(i)
 
@@ -724,7 +724,7 @@ class CXP_FMC():
             self.csr_devices.append(cxp_name)
             cxp_csr_group.append(cxp_name)
 
-            cxp_downconns.append(cxp_interface.get_rx_downconn())
+            cxp_rx_pipelines.append(cxp_interface.get_rx_pipeline())
 
             # Add memory group
 
@@ -739,7 +739,7 @@ class CXP_FMC():
         self.add_memory_group("cxp_mem", cxp_mem_group)
         self.add_csr_group("cxp", cxp_csr_group)
 
-        self.submodules.cxp_frame_pipeline = cxp.CXP_Frame_Pipeline(cxp_downconns, pmod_pads)
+        self.submodules.cxp_frame_pipeline = cxp.CXP_Frame_Pipeline(cxp_rx_pipelines, pmod_pads)
         self.csr_devices.append("cxp_frame_pipeline")