forked from M-Labs/artiq-zynq
zc706: add USER LED to allow compilation
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@ -656,6 +656,21 @@ class _CXP_FMC_RTIO():
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def __init__(self):
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platform = self.platform
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platform.add_extension(coaxpress_4r.fmc_adapter_io)
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platform.add_extension(leds_fmc33)
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rtio_channels = []
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# FIXME remove this placeholder RTIO channel
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# There are too few RTIO channels and cannot be compiled (adr width issue of the lane distributor)
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# see https://github.com/m-labs/artiq/pull/2158 for similar issue
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print("USER LED at RTIO channel 0x{:06x}".format(len(rtio_channels)))
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phy = ttl_simple.Output(self.platform.request("user_led_33", 0))
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy))
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self.config["HAS_RTIO_LOG"] = None
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rtio_channels.append(rtio.LogChannel())
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self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
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self.add_rtio(rtio_channels)
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class NIST_CLOCK(ZC706, _NIST_CLOCK_RTIO):
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def __init__(self, acpki, drtio100mhz):
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