From f49f3dbb556d32a9c6de565843761443c7021a5e Mon Sep 17 00:00:00 2001 From: morgan Date: Wed, 4 Sep 2024 12:58:08 +0800 Subject: [PATCH] cxp upconn fw: add packet writer & packet types --- src/libboard_artiq/src/cxp_upconn.rs | 174 ++++++++++++++++++++------- 1 file changed, 133 insertions(+), 41 deletions(-) diff --git a/src/libboard_artiq/src/cxp_upconn.rs b/src/libboard_artiq/src/cxp_upconn.rs index a3b4047..0970130 100644 --- a/src/libboard_artiq/src/cxp_upconn.rs +++ b/src/libboard_artiq/src/cxp_upconn.rs @@ -1,4 +1,6 @@ +use core_io::{Error as IoError, Read, Write}; use embedded_hal::prelude::_embedded_hal_blocking_delay_DelayUs; +use io::Cursor; use libboard_zynq::{println, timer::GlobalTimer}; use crate::pl::csr; @@ -46,38 +48,6 @@ pub fn trigger_ack_test(timer: &mut GlobalTimer) { } } -pub fn pipeline_test(timer: &mut GlobalTimer) { - let arr = [ - // 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08 - 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, - // 0x56, 0x86, 0x5D, 0x6f, // CXP CRC-32 - ]; - - const LEN: usize = 4 * 8; - let mut pak_arr: [u8; LEN] = [0; LEN]; - - unsafe { - write(0x02, &arr); // read control command - - // wait for pipelining - timer.delay_us(1); - - let mut i: usize = 0; - while csr::cxp::upconn_command_dout_valid_read() == 1 { - pak_arr[i] = csr::cxp::upconn_command_dout_pak_read(); - // println!("received {:#04X}", pak_arr[i]); - csr::cxp::upconn_command_inc_write(1); - i += 1; - if i == LEN { - break; - }; - } - - println!("data packet"); - print_packet(&pak_arr); - } -} - pub fn tx_test(timer: &mut GlobalTimer) { const LEN: usize = 4 * 30; let mut pak_arr: [u8; LEN] = [0; LEN]; @@ -121,28 +91,150 @@ pub fn tx_test(timer: &mut GlobalTimer) { } } -pub fn write(packet_type: u8, buf: &[u8]) { +pub enum Packet { + ControlWrite_u32_no_tag { + addr: u32, + data: u32, + packet_type: u8, + }, + ControlRead_u32_no_tag { + addr: u32, + packet_type: u8, + }, + ControlWrite_u64_no_tag { + addr: u32, + data: u64, + packet_type: u8, + }, + ControlRead_u64_no_tag { + addr: u32, + packet_type: u8, + }, + + ControlWrite_u32_with_tag { + addr: u32, + data: u32, + packet_type: u8, + tag: u8, + }, + ControlRead_u32_with_tag { + addr: u32, + packet_type: u8, + tag: u8, + }, + ControlWrite_u64_with_tag { + addr: u32, + data: u64, + packet_type: u8, + tag: u8, + }, + ControlRead_u64_with_tag { + addr: u32, + packet_type: u8, + tag: u8, + }, +} + +impl Packet { + pub fn write_to(&self, writer: &mut W) -> Result<(), IoError> + where W: Write { + match *self { + Packet::ControlWrite_u32_no_tag { addr, data, .. } => { + writer.write(&[0x01, 0x00, 0x00, 0x04])?; + writer.write(&addr.to_be_bytes())?; + writer.write(&data.to_be_bytes())?; + } + Packet::ControlRead_u32_no_tag { addr, .. } => { + writer.write(&[0x00, 0x00, 0x00, 0x04])?; + writer.write(&addr.to_be_bytes())?; + } + _ => { + // // TODO: placeholder for rust borrow checker + // writer.write_u32(0x00)?; + } + } + Ok(()) + } +} + +pub fn send(packet: &Packet) -> Result<(), IoError> { + const LEN: usize = 4 * 20; + let mut buffer: [u8; LEN] = [0; LEN]; + let mut writer = Cursor::new(&mut buffer[..]); + + packet.write_to(&mut writer)?; + + // // Pad till offset 4, insert checksum there + // let padding = (12 - (writer.position() % 8)) % 8; + // for _ in 0..padding { + // writer.write_u8(0)?; + // } + + // let checksum = crc::crc32::checksum_ieee(&writer.get_ref()[0..writer.position()]); + // writer.write_u32(checksum)?; + + // let mut res: [u8; LEN] = [0; LEN]; + // res.clone_from_slice(&mut write); + unsafe { - // eop = 1 (End of packet) at the last data input - csr::cxp::upconn_command_din_len_write(buf.len() as u8); - csr::cxp::upconn_command_packet_type_write(packet_type); - for data in buf.iter() { + let len = writer.position(); + csr::cxp::upconn_command_din_len_write(len as u8); + match *packet { + Packet::ControlWrite_u32_no_tag { packet_type, .. } + | Packet::ControlRead_u32_no_tag { packet_type, .. } => { + csr::cxp::upconn_command_packet_type_write(packet_type); + } + _ => { + println!("packet_type is not inserted!!!!"); + } + } + for data in writer.get_ref()[..len].iter() { while csr::cxp::upconn_command_din_ready_read() == 0 {} csr::cxp::upconn_command_din_data_write(*data); println!("{:#04X}", *data); } } + + Ok(()) } -pub fn CXP_Control(timer: &mut GlobalTimer) { - let addr: u32 = 0x0000_00FF; +pub fn pipeline_test(timer: &mut GlobalTimer) { + let address: u32 = 0x0000_00FF; let tag: u8 = 0x44; let d0: u32 = 0x0000_0032; let d1: u64 = 0x0000_0064; - // TODO: reference drtioaux_proto.rs + // send(&Packet::ControlWrite_u32_no_tag { + // addr: address, + // data: d0, + // packet_type: 0x02, + // }); - // TODO: add firmware CRC & packet type + // CXP CRC example + send(&Packet::ControlRead_u32_no_tag { + addr: 0x00, + packet_type: 0x02, + }); + + unsafe { + timer.delay_us(1); + const LEN: usize = 4 * 8; + let mut pak_arr: [u8; LEN] = [0; LEN]; + + let mut i: usize = 0; + while csr::cxp::upconn_command_dout_valid_read() == 1 { + pak_arr[i] = csr::cxp::upconn_command_dout_pak_read(); + // println!("received {:#04X}", pak_arr[i]); + csr::cxp::upconn_command_inc_write(1); + i += 1; + if i == LEN { + break; + }; + } + + println!("data packet"); + print_packet(&pak_arr); + } } fn print_packet(pak: &[u8]) {