forked from M-Labs/artiq-zynq
upconn FW: rename var
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c6c0192b13
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f11016cbb5
@ -28,7 +28,7 @@ pub fn tx_test(channel: u8, timer: &mut GlobalTimer) {
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},
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);
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csr::cxp_phys::upconn_tx_enable_write(1);
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csr::cxp_phys::tx_enable_write(1);
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timer.delay_us(1);
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// DEBUG: send ctrl packet or test
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@ -42,15 +42,15 @@ pub fn tx_test(channel: u8, timer: &mut GlobalTimer) {
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// (CXP[channel].upconn_ack_write)(1);
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timer.delay_us(2000);
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csr::cxp_phys::upconn_tx_enable_write(0);
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csr::cxp_phys::tx_enable_write(0);
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// Collect data
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let mut i: usize = 0;
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match channel {
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0 => {
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while csr::cxp_phys::upconn_tx0_debug_buf_dout_valid_read() == 1 {
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pak_arr[i] = csr::cxp_phys::upconn_tx0_debug_buf_dout_pak_read();
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csr::cxp_phys::upconn_tx0_debug_buf_inc_write(1);
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while csr::cxp_phys::tx_tx0_debug_buf_dout_valid_read() == 1 {
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pak_arr[i] = csr::cxp_phys::tx_tx0_debug_buf_dout_pak_read();
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csr::cxp_phys::tx_tx0_debug_buf_inc_write(1);
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i += 1;
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if i == LEN {
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break;
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@ -58,9 +58,9 @@ pub fn tx_test(channel: u8, timer: &mut GlobalTimer) {
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}
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}
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1 => {
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while csr::cxp_phys::upconn_tx1_debug_buf_dout_valid_read() == 1 {
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pak_arr[i] = csr::cxp_phys::upconn_tx1_debug_buf_dout_pak_read();
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csr::cxp_phys::upconn_tx1_debug_buf_inc_write(1);
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while csr::cxp_phys::tx_tx1_debug_buf_dout_valid_read() == 1 {
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pak_arr[i] = csr::cxp_phys::tx_tx1_debug_buf_dout_pak_read();
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csr::cxp_phys::tx_tx1_debug_buf_inc_write(1);
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i += 1;
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if i == LEN {
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break;
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