diff --git a/src/gateware/cxp_downconn.py b/src/gateware/cxp_downconn.py
index eabaff2..b193d8f 100644
--- a/src/gateware/cxp_downconn.py
+++ b/src/gateware/cxp_downconn.py
@@ -13,7 +13,7 @@ from functools import reduce
 from operator import add
 
 class CXP_RXPHYs(Module, AutoCSR):
-    def __init__(self, refclk, pads, sys_clk_freq, master):
+    def __init__(self, gt_refclk, pads, sys_clk_freq, master):
         self.qpll_reset = CSR()
         self.qpll_locked = CSRStatus()
         self.gtx_start_init = CSRStorage()
@@ -23,7 +23,7 @@ class CXP_RXPHYs(Module, AutoCSR):
         # # #
 
         # For speed higher than 6.6Gbps, QPLL need to be used instead of CPLL - DS191 (v1.18.1) Table 9.1
-        self.submodules.qpll = qpll = QPLL(refclk, sys_clk_freq)
+        self.submodules.qpll = qpll = QPLL(gt_refclk, sys_clk_freq)
         self.sync += [
             qpll.reset.eq(self.qpll_reset.re),
             self.qpll_locked.status.eq(qpll.lock),
@@ -70,7 +70,7 @@ class Receiver(Module):
         ]
 
 class QPLL(Module, AutoCSR):
-    def __init__(self, refclk, sys_clk_freq):
+    def __init__(self, gt_refclk, sys_clk_freq):
         self.clk = Signal()
         self.refclk = Signal()
         self.lock = Signal()
@@ -101,7 +101,7 @@ class QPLL(Module, AutoCSR):
         self.specials += [
             Instance("GTXE2_COMMON",
                 i_QPLLREFCLKSEL=0b001,
-                i_GTREFCLK0=refclk,         
+                i_GTREFCLK0=gt_refclk,         
 
                 i_QPLLPD=0,
                 i_QPLLRESET=self.reset,