forked from M-Labs/artiq-zynq
zc706: no syncrtio for master, fixes hangs (#188)
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@ -311,10 +311,9 @@ class _MasterBase(SoCCore):
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self.submodules.rtio_dma = dma.DMA(self.ps7.s_axi_hp0)
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self.submodules.rtio_dma = dma.DMA(self.ps7.s_axi_hp0)
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self.csr_devices.append("rtio_dma")
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self.csr_devices.append("rtio_dma")
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self.submodules.local_io = SyncRTIO(self.rtio_tsc, rtio_channels)
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self.submodules.cri_con = rtio.CRIInterconnectShared(
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self.submodules.cri_con = rtio.CRIInterconnectShared(
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[self.rtio.cri, self.rtio_dma.cri],
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[self.rtio.cri, self.rtio_dma.cri],
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[self.local_io.cri] + self.drtio_cri,
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[self.rtio_core.cri] + self.drtio_cri,
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mode="sync", enable_routing=True)
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mode="sync", enable_routing=True)
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self.csr_devices.append("cri_con")
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self.csr_devices.append("cri_con")
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