diff --git a/src/gateware/cxp_frame_pipeline.py b/src/gateware/cxp_frame_pipeline.py index 6d47557..3447f9d 100644 --- a/src/gateware/cxp_frame_pipeline.py +++ b/src/gateware/cxp_frame_pipeline.py @@ -575,32 +575,24 @@ class Frame_Deserializer(Module): self.new_frame = Signal() self.l_size = Signal(3*char_width) self.x_size = Signal(3*char_width) + self.pixel_format = Signal(2*char_width) + self.source = stream.Endpoint(pixel4x_layout) # # # self.submodules.eol_inserter = eol_inserter = End_Of_Line_Inserter() self.sync += eol_inserter.l_size.eq(self.l_size), + self.sink = eol_inserter.sink + + gearboxes = {} for s in [8, 10, 12, 14, 16]: gearbox = Pixel_Gearbox(s) + gearboxes["mono"+str(s)] = gearbox self.submodules += gearbox self.sync += gearbox.x_size.eq(self.x_size), - self.comb += eol_inserter.source.connect(gearbox.sink) - self.comb += gearbox.source.ack.eq(1) # simulated a proper consumer, idk why but without this it will destory timing - # self.submodules.gearbox = gearbox = Custom_Pixel_Gearbox(8) - # self.sync += gearbox.x_size.eq(self.x_size), - # self.comb += eol_inserter.source.connect(gearbox.sink) - - - self.sink = eol_inserter.sink - # self.source = gearbox.source - - - - - # # TODO: use this to control mux - # Table 34 (CXP-001-2021) + # From Table 34 (CXP-001-2021) pix_fmt = { "mono8": 0x0101, "mono10": 0x0102, @@ -608,19 +600,21 @@ class Frame_Deserializer(Module): "mono14": 0x0104, "mono16": 0x0105, } - # self.sync += [ - # pixel_format_r.eq(header_decoder.metadata.pixel_format), - # Case(pixel_format_r, - # { - # pix_fmt["mono8"]: pix_size.eq(8), - # pix_fmt["mono10"]: pix_size.eq(10), - # pix_fmt["mono12"]: pix_size.eq(12), - # pix_fmt["mono14"]: pix_size.eq(14), - # pix_fmt["mono16"]: pix_size.eq(16), - # "default": pix_size.eq(pix_size.reset), - # } - # ) - # ] + + mux_cases = { + "default": [ + # discard unknown pixel format data + eol_inserter.source.ack.eq(1), + ], + } + for fmt in pix_fmt: + mux_cases[pix_fmt[fmt]] = [ + eol_inserter.source.connect(gearboxes[fmt].sink), + gearboxes[fmt].source.connect(self.source), + ] + + self.comb += Case(self.pixel_format, mux_cases) + class ROI_Pipeline(Module): @@ -639,6 +633,7 @@ class ROI_Pipeline(Module): deserializer.new_frame.eq(header_decoder.new_frame), deserializer.l_size.eq(header_decoder.metadata.l_size), deserializer.x_size.eq(header_decoder.metadata.x_size), + deserializer.pixel_format.eq(header_decoder.metadata.pixel_format), ] self.pipeline = [buffer, crc_checker, header_decoder, deserializer] @@ -647,8 +642,8 @@ class ROI_Pipeline(Module): self.sink = self.pipeline[0].sink # DEBUG - # self.source = self.pipeline[-1].source - # self.comb += self.source.ack.eq(1) # simulated a proper consumer, idk why but without this it will destory timing + self.source = self.pipeline[-1].source + self.comb += self.source.ack.eq(1) # simulated a proper consumer, idk why but without this it will destory timing class Frame_Packet_Router(Module): # packet size expressed in bits