From dbf7ac1cb9eb2ab12be767fda3294238149d3e7b Mon Sep 17 00:00:00 2001 From: morgan Date: Fri, 28 Jun 2024 15:46:13 +0800 Subject: [PATCH] cxp upconn : fix idle word lag behind tx_wordcount --- src/gateware/cxp_upconn.py | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/src/gateware/cxp_upconn.py b/src/gateware/cxp_upconn.py index 3aa09b5..d8dfecd 100644 --- a/src/gateware/cxp_upconn.py +++ b/src/gateware/cxp_upconn.py @@ -99,20 +99,33 @@ class CXP_UpConn(Module, AutoCSR): ) ) + + idle_ack = Signal() + # CXP 2.1 section 9.2.4 # Higher priority packet can be inserted into a lower priority packet during transmission # Priority lv 0 can be inserted in char boundary of the packet # Priority lv 1-2 need to be inserted in word boundary of the packet self.sync.cxp_upconn += [ - self.tx_fifos.disp_in.eq(disp), - self.encoder.disp_in.eq(disp), - self.encoder.d.eq(Array(IDLE_CHARS)[tx_wordcount][0]), - self.encoder.k.eq(Array(IDLE_CHARS)[tx_wordcount][1]), If(tx_en, o.eq(tx_reg[0]), tx_reg.eq(Cat(tx_reg[1:], 0)), tx_bitcount.eq(tx_bitcount + 1), + self.tx_fifos.disp_in.eq(disp), + self.encoder.disp_in.eq(disp), + If(idle_ack, + # reset after asserted + idle_ack.eq(0), + If(tx_wordcount == 3, + self.encoder.d.eq(Array(IDLE_CHARS)[0][0]), + self.encoder.k.eq(Array(IDLE_CHARS)[0][1]), + ).Else( + self.encoder.d.eq(Array(IDLE_CHARS)[tx_wordcount + 1][0]), + self.encoder.k.eq(Array(IDLE_CHARS)[tx_wordcount + 1][1]), + ) + ), + # char boundary If(tx_bitcount == 9, tx_bitcount.eq(0), @@ -129,16 +142,19 @@ class CXP_UpConn(Module, AutoCSR): tx_wordcount.eq(0), ), - # word boundary - If(tx_wordcount == 0, + # new word boundary + If(tx_wordcount == 3, If(~self.tx_fifos.pe.n, idling.eq(0), priority.eq(self.tx_fifos.pe.o), + self.tx_fifos.source_ack[self.tx_fifos.pe.o].eq(1), tx_reg.eq(self.tx_fifos.source_data[self.tx_fifos.pe.o]), disp.eq(self.tx_fifos.disp_out[self.tx_fifos.pe.o]), ).Else( idling.eq(1), + + idle_ack.eq(1), tx_reg.eq(self.encoder.output), disp.eq(self.encoder.disp_out), ) @@ -148,6 +164,7 @@ class CXP_UpConn(Module, AutoCSR): tx_reg.eq(self.tx_fifos.source_data[priority]), disp.eq(self.tx_fifos.disp_out[priority]), ).Else( + idle_ack.eq(1), tx_reg.eq(self.encoder.output), disp.eq(self.encoder.disp_out), ) @@ -174,7 +191,7 @@ class CXP_UpConn(Module, AutoCSR): p2 = Signal() self.comb += [ ninth_bit.eq(tx_bitcount == 9), - word_bound.eq(tx_wordcount == 0), + word_bound.eq(tx_wordcount == 3), p1.eq(priority == 1), p2.eq(priority == 2), ]