forked from M-Labs/artiq-zynq
sim: add proto frame extractor
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parent
18c16062b1
commit
bfd901ddc4
105
sim_pipeline.py
105
sim_pipeline.py
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@ -263,14 +263,108 @@ class Stream_Parser(Module):
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),
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)
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class Frame_Decoder(Module):
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def __init__(self):
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self.sink = stream.Endpoint(word_layout_dchar)
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self.source = stream.Endpoint(word_layout_dchar)
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class Frame_Extractor(Module):
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def __init__(self, pixel_format="mono16"):
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assert pixel_format in ["mono16"]
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pixel_format = {
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"mono16": C(0x0105, 2*char_width)
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}
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self.format_error = Signal()
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self.decode_err = Signal()
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self.new_frame = Signal()
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self.new_line = Signal()
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n_metadata_chars = 23
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self.metadata = Record([
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("stream_id", char_width),
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("source_tag", 2*char_width),
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("x_size", 3*char_width),
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("x_offset", 3*char_width),
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("y_size", 3*char_width),
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("y_offset", 3*char_width),
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("l_size", 3*char_width), # number of data words per image line
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("pixel_format", 2*char_width),
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("tap_geo", 2*char_width),
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("flag", char_width),
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])
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assert len(self.metadata.raw_bits()) == n_metadata_chars*char_width
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# # #
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# TODO: decode Image header, line break
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self.sink = stream.Endpoint(word_layout_dchar)
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self.source = stream.Endpoint(word_layout_dchar)
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self.submodules.fsm = fsm = FSM(reset_state="IDLE")
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# DEBUG: remove this
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self.fsm_state = Signal()
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self.comb += self.fsm_state.eq(fsm.ongoing("IDLE"))
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fsm.act("IDLE",
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self.sink.ack.eq(1),
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If((self.sink.stb & (self.sink.dchar == KCode["stream_marker"]) & (self.sink.dchar_k == 1)),
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NextState("DECODE"),
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)
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)
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fsm.act("COPY",
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# until for new line or new frame
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If((self.sink.stb & (self.sink.dchar == KCode["stream_marker"]) & (self.sink.dchar_k == 1)),
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self.sink.ack.eq(1),
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NextState("DECODE"),
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).Else(
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self.sink.connect(self.source),
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)
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)
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type = {
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"new_frame": 0x01,
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"line_break": 0x02,
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}
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cnt = Signal(max=n_metadata_chars)
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fsm.act("DECODE",
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self.sink.ack.eq(1),
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If(self.sink.stb,
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Case(self.sink.dchar, {
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type["new_frame"]: [
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self.new_frame.eq(1),
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NextValue(cnt, cnt.reset),
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NextState("GET_STREAM_ID"),
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],
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type["line_break"]: [
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self.new_line.eq(1),
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NextState("COPY"),
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],
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"default": [
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self.decode_err.eq(1),
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# discard all data until valid frame
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NextState("IDLE"),
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],
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}),
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)
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)
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case = dict(
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(i, NextValue(self.metadata.raw_bits()[8*i:8*(i+1)], self.sink.dchar))
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for i in range(n_metadata_chars)
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)
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fsm.act("GET_STREAM_ID",
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self.sink.ack.eq(1),
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If(self.sink.stb,
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Case(cnt, case),
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If(cnt == n_metadata_chars - 1,
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NextState("COPY"),
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NextValue(cnt, cnt.reset),
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).Else(
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NextValue(cnt, cnt + 1),
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),
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),
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)
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class Pixel_Decoder(Module):
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def __init__(self, pixel_format="mono16"):
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@ -289,8 +383,9 @@ class Stream_Pipeline(Module):
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self.submodules.double_buffer = double_buffer = Double_Stream_Buffer(size)
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self.submodules.parser = parser = Stream_Parser()
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self.submodules.frame_extractor = frame_extractor = Frame_Extractor()
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pipeline = [double_buffer, parser]
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pipeline = [double_buffer, parser, frame_extractor]
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for s, d in zip(pipeline, pipeline[1:]):
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self.comb += s.source.connect(d.sink)
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self.sink = pipeline[0].sink
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@ -84,7 +84,7 @@ def check_case(packet=[]):
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print(
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f"\nCYCLE#{i} : source char = {yield source.data:#X} k = {yield source.k:#X} stb = {yield source.stb} ack = {yield source.ack} eop = {yield source.eop}"
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# f" source dchar = {yield source.dchar:#X} dchar_k = {yield source.dchar_k:#X}"
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f"\nCYCLE#{i} : read mask = {yield dut.crossbar .mux.sel}"
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f"\nCYCLE#{i} : read mask = {yield dut.crossbar.mux.sel}"
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# f"\nCYCLE#{i} : stream id = {yield decoder.stream_id:#X} pak_tag = {yield decoder.pak_tag:#X}"
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# f" stream_pak_size = {yield decoder.stream_pak_size:#X}"
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)
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@ -125,7 +125,7 @@ def testbench():
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],
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[
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{"data": 0x22222222, "k": Replicate(0, 4)},
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{"data": 0xC00010FF, "k": Replicate(0, 4)},
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{"data": 0xC001BEA0, "k": Replicate(0, 4)},
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],
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[
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{"data": 0x33333333, "k": Replicate(0, 4)},
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