forked from M-Labs/artiq-zynq
cxp upconn: rename high speed upconn to bitrate2x
This commit is contained in:
parent
d36afd6f7b
commit
bbf9e37867
|
@ -11,7 +11,7 @@ class CXP_UpConn(Module, AutoCSR):
|
|||
self.clock_domains.cd_cxp_upconn = ClockDomain()
|
||||
self.clk_reset = CSRStorage(reset=1)
|
||||
|
||||
self.high_speed_upconn = CSRStorage()
|
||||
self.bitrate2x_enable = CSRStorage()
|
||||
|
||||
# # #
|
||||
|
||||
|
@ -42,7 +42,7 @@ class CXP_UpConn(Module, AutoCSR):
|
|||
Instance("BUFGMUX",
|
||||
i_I0=pll_cxpclk,
|
||||
i_I1=pll_cxpclk2x,
|
||||
i_S=self.high_speed_upconn.storage,
|
||||
i_S=self.bitrate2x_enable.storage,
|
||||
o_O=self.cd_cxp_upconn.clk
|
||||
),
|
||||
AsyncResetSynchronizer(self.cd_cxp_upconn, ~pll_locked | self.clk_reset.storage)
|
||||
|
|
Loading…
Reference in New Issue