forked from M-Labs/artiq-zynq
lib: compile mem with cxp
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@ -25,7 +25,7 @@ pub mod fiq;
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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pub mod io_expander;
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pub mod io_expander;
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pub mod logger;
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pub mod logger;
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#[cfg(has_drtio)]
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#[cfg(any(has_drtio, has_cxp_phys))]
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#[rustfmt::skip]
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#[rustfmt::skip]
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#[path = "../../../build/mem.rs"]
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#[path = "../../../build/mem.rs"]
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pub mod mem;
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pub mod mem;
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