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fmc: add cxp_4r_fmc adepter io

This commit is contained in:
morgan 2024-06-03 15:58:13 +08:00
parent 1a05dd6ac4
commit abd9157065
1 changed files with 87 additions and 0 deletions
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87
src/gateware/cxp_4r_fmc.py Normal file
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from migen.build.generic_platform import *
fmc_adapter_io = [
# CoaXPress high speed link
("CXP_HS", 0,
Subsignal("txp", Pins("HPC:DP0_C2M_P")),
Subsignal("txn", Pins("HPC:DP0_C2M_N")),
Subsignal("rxp", Pins("HPC:DP0_M2C_P")),
Subsignal("rxn", Pins("HPC:DP0_M2C_N")),
),
("CXP_HS", 1,
Subsignal("txp", Pins("HPC:DP1_C2M_P")),
Subsignal("txn", Pins("HPC:DP1_C2M_N")),
Subsignal("rxp", Pins("HPC:DP1_M2C_P")),
Subsignal("rxn", Pins("HPC:DP1_M2C_N")),
),
("CXP_HS", 2,
Subsignal("txp", Pins("HPC:DP2_C2M_P")),
Subsignal("txn", Pins("HPC:DP2_C2M_N")),
Subsignal("rxp", Pins("HPC:DP2_M2C_P")),
Subsignal("rxn", Pins("HPC:DP2_M2C_n")),
),
("CXP_HS", 3,
Subsignal("txp", Pins("HPC:DP3_C2M_P")),
Subsignal("txn", Pins("HPC:DP3_C2M_N")),
Subsignal("rxp", Pins("HPC:DP3_M2C_P")),
Subsignal("rxn", Pins("HPC:DP3_M2C_N")),
),
# CoaXPress low speed link
("CXP_LS", 0, Pins("HPC:LA00_CC_P"), IOStandard("LVCMOS25")),
("CXP_LS", 1, Pins("HPC:LA01_CC_N"), IOStandard("LVCMOS25")),
("CXP_LS", 2, Pins("HPC:LA01_CC_P"), IOStandard("LVCMOS25")),
("CXP_LS", 3, Pins("HPC:LA02_N"), IOStandard("LVCMOS25")),
# CoaXPress green and red LED
("CXP_LED", 0,
Subsignal("green", Pins("HPC:LA11_P"), IOStandard("LVCMOS25")),
Subsignal("red", Pins("HPC:LA11_N"), IOStandard("LVCMOS25")),
),
("CXP_LED", 1,
Subsignal("green", Pins("HPC:LA12_P"), IOStandard("LVCMOS25")),
Subsignal("red", Pins("HPC:LA12_N"), IOStandard("LVCMOS25")),
),
("CXP_LED", 2,
Subsignal("green", Pins("HPC:LA13_P"), IOStandard("LVCMOS25")),
Subsignal("red", Pins("HPC:LA13_N"), IOStandard("LVCMOS25")),
),
("CXP_LED", 3,
Subsignal("green", Pins("HPC:LA14_P"), IOStandard("LVCMOS25")),
Subsignal("red", Pins("HPC:LA14_N"), IOStandard("LVCMOS25")),
),
# Power over CoaXPress
("PoCXP", 0,
Subsignal("enable", Pins("HPC:LA21_N"), IOStandard("LVCMOS25")),
Subsignal("alert", Pins("HPC:LA18_CC_P"), IOStandard("LVCMOS25")),
),
("PoCXP", 1,
Subsignal("enable", Pins("HPC:LA21_P"), IOStandard("LVCMOS25")),
Subsignal("alert", Pins("HPC:LA19_N"), IOStandard("LVCMOS25")),
),
("PoCXP", 2,
Subsignal("enable", Pins("HPC:LA22_N"), IOStandard("LVCMOS25")),
Subsignal("alert", Pins("HPC:LA19_P"), IOStandard("LVCMOS25")),
),
("PoCXP", 3,
Subsignal("enable", Pins("HPC:LA22_P"), IOStandard("LVCMOS25")),
Subsignal("alert", Pins("HPC:LA20_N"), IOStandard("LVCMOS25")),
),
("i2c_fmc", 0,
Subsignal("scl", Pins("HPC:IIC_SCL")),
Subsignal("sda", Pins("HPC:IIC_SDA")),
IOStandard("LVCMOS25")
),
("3V3", 0, Pins("HPC:PG_M2C")),
("GND", 0, Pins("HPC:PRSNT_M2C_L HPC:CLK0_M2C_P")),
("VADJ", 0, Pins("HPC:GBTCLK1_M2C_N CLK0_M2C_N")),
("clk125_fmc", 0,
Subsignal("p", Pins("HPC:GBTCLK0_M2C_P")),
Subsignal("n", Pins("HPC:GBTCLK0_M2C_n")),
),
]