From a6ad4501b1b85a5069740a56d9c566bc14202e7b Mon Sep 17 00:00:00 2001 From: morgan Date: Fri, 7 Feb 2025 13:16:54 +0800 Subject: [PATCH] cxp GW: add 8 ROI & cleanup --- src/gateware/cxp.py | 23 +++-------------------- 1 file changed, 3 insertions(+), 20 deletions(-) diff --git a/src/gateware/cxp.py b/src/gateware/cxp.py index 2dd0326..bc5917f 100644 --- a/src/gateware/cxp.py +++ b/src/gateware/cxp.py @@ -287,7 +287,7 @@ class CXP_Frame_Pipeline(Module, AutoCSR): class CXP_Grabber(Module, AutoCSR): # optimal stream packet size is 2 KiB - Section 9.5.2 (CXP-001-2021) - def __init__(self, host, roi_engine_count=2, res_width=16, count_width=31): + def __init__(self, host, roi_engine_count=8, res_width=16, count_width=31): assert count_width <= 31 self.crc_error_cnt = CSRStatus(16) @@ -367,6 +367,8 @@ class CXP_Grabber(Module, AutoCSR): buffer.source.connect(stream2pix.sink), ] + # ROI engines config and count gating + roi_engines = [cdr(ROI(stream2pix.pixel4x, count_width)) for _ in range(roi_engine_count)] self.submodules += roi_engines @@ -378,25 +380,6 @@ class CXP_Grabber(Module, AutoCSR): roi_boundary.eq(self.config.o.data)) self.specials += MultiReg(roi_boundary, target, "cxp_gt_rx") - # roi_out = roi.out - # update = Signal() - # self.submodules.ps = ps = PulseSynchronizer("cxp_gt_rx", "sys") - # self.sync.cxp_gt_rx += ps.i.eq(roi_out.update) - # self.sync += update.eq(ps.o) - - # sentinel = 2**count_width - # count_sys = Signal.like(roi_out.count) - - # self.specials += MultiReg(roi_out.count, count_sys), - # self.sync.rio += [ - # # TODO: add gating - # self.gate_data.i.stb.eq(update), - # # without the slice, unspecified bits will be 1 for some reason - # # i.e. data[count_wdith:] = 0b111111... when using data.eq(count_sys) - # self.gate_data.i.data[:count_width].eq(count_sys), - # ] - - self.submodules.synchronizer = synchronizer = CXP_Synchronizer(roi_engines) self.submodules.serializer = serializer = Serializer(synchronizer.update, synchronizer.counts, self.gate_data.i)