morgan
/
artiq-zynq
forked from M-Labs/artiq-zynq
1
0
Fork 0
Code Pull Requests Activity

cxp GW: add debug pipeline for downconn

This commit is contained in:
morgan 2024-09-16 12:58:58 +08:00
parent 1b704a738c
commit 97b940fb0a
1 changed files with 4 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/gateware/cxp.py
View File

@ -30,8 +30,11 @@ class DownConn_Interface(Module, AutoCSR):
self.submodules.conv = conv = stream.StrideConverter(upconn_layout, downconn_layout, reverse=True) self.submodules.conv = conv = stream.StrideConverter(upconn_layout, downconn_layout, reverse=True)
self.submodules.debug_out = debug_out = RX_Debug_Buffer() self.submodules.debug_out = debug_out = RX_Debug_Buffer()
rx_pipeline = [debug_src, conv, debug_out] tx_pipeline = [debug_src, conv, phy.sinks[0]]
for s, d in zip(tx_pipeline, tx_pipeline[1:]):
self.comb += s.source.connect(d.sink)
rx_pipeline = [phy.sources[0], debug_out]
for s, d in zip(rx_pipeline, rx_pipeline[1:]): for s, d in zip(rx_pipeline, rx_pipeline[1:]):
self.comb += s.source.connect(d.sink) self.comb += s.source.connect(d.sink)