forked from M-Labs/artiq-zynq
api: add cxp api support for CTRL packet
api: DEBUG print api: add bytes read for XML download api: fix debug printout endianese issue
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224
src/libksupport/src/cxp.rs
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224
src/libksupport/src/cxp.rs
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@ -0,0 +1,224 @@
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use byteorder::{ByteOrder, NetworkEndian};
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use cslice::CMutSlice;
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use libboard_artiq::{cxp::{setup, MASTER_CHANNEL},
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cxp_ctrl,
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cxp_proto::DATA_MAXSIZE};
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// for downloading the XML files
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// TODO: change this to read bytes and accept TBytearray
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pub extern "C" fn cxp_read_words(addr: i32, val: &mut CMutSlice<i32>, with_tag: bool) {
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let mut bytes: [u8; DATA_MAXSIZE] = [0; DATA_MAXSIZE];
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cxp_ctrl::read_bytes(MASTER_CHANNEL, addr as u32, &mut bytes[..val.len() * 4], with_tag)
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.unwrap_or_else(|e| panic!("CXP readu64 failure: {}", e));
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for i in 0..val.len() {
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val.as_mut_slice()[i] = NetworkEndian::read_u32(&bytes[i * 4..(i + 1) * 4]) as i32;
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}
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}
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pub extern "C" fn cxp_readu32(addr: i32, with_tag: bool) -> i32 {
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// TODO: use artiq_raise like i2c?
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cxp_ctrl::read_u32(MASTER_CHANNEL, addr as u32, with_tag).unwrap_or_else(|e| panic!("CXP readu64 failure: {}", e))
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as i32
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}
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pub extern "C" fn cxp_readu64(addr: i32, with_tag: bool) -> i64 {
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// TODO: use artiq_raise like i2c?
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cxp_ctrl::read_u64(MASTER_CHANNEL, addr as u32, with_tag).unwrap_or_else(|e| panic!("CXP read u64 failure: {}", e))
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as i64
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}
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pub extern "C" fn cxp_writeu32(addr: i32, val: i32, with_tag: bool) {
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// TODO: use artiq_raise like i2c?
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cxp_ctrl::write_u32(MASTER_CHANNEL, addr as u32, val as u32, with_tag)
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.unwrap_or_else(|e| panic!("CXP write u32 failure: {}", e));
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}
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pub extern "C" fn cxp_writeu64(addr: i32, val: i64, with_tag: bool) {
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// TODO: use artiq_raise like i2c?
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cxp_ctrl::write_u64(MASTER_CHANNEL, addr as u32, val as u64, with_tag)
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.unwrap_or_else(|e| panic!("CXP write u64 failure: {}", e));
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}
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pub extern "C" fn cxp_setup() -> bool {
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setup().unwrap()
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}
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// DEBUG: ONLY
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pub extern "C" fn cxp_debug_frame_print() {
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use libboard_zynq::println;
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use crate::pl::csr::{cxp_frame_pipeline, CXP};
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const LEN: usize = 200;
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let mut eop: [u8; LEN] = [0; LEN];
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let mut pak_arr: [u32; LEN] = [0; LEN];
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let mut k_arr: [u8; LEN] = [0; LEN];
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let mut err: [u8; LEN] = [0; LEN];
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let mut i: usize = 0;
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unsafe {
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while cxp_frame_pipeline::debug_out_dout_valid_read() == 1 {
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pak_arr[i] = cxp_frame_pipeline::debug_out_dout_pak_read();
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k_arr[i] = cxp_frame_pipeline::debug_out_kout_pak_read();
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eop[i] = cxp_frame_pipeline::debug_out_eop_read();
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err[i] = cxp_frame_pipeline::debug_out_crc_error_read();
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// println!("received {:#04X}", pak_arr[i]);
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cxp_frame_pipeline::debug_out_inc_write(1);
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i += 1;
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if i == LEN {
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break;
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}
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}
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// let channel: usize = 0;
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// while (CXP[channel].downconn_debug_out_dout_valid_read)() == 1 {
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// pak_arr[i] = (CXP[channel].downconn_debug_out_dout_pak_read)();
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// k_arr[i] = (CXP[channel].downconn_debug_out_kout_pak_read)();
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// // println!("received {:#04X}", pak_arr[i]);
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// (CXP[channel].downconn_debug_out_inc_write)(1);
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// i += 1;
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// if i == LEN {
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// break;
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// }
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// }
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println!(
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"Decode error = {}",
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(CXP[MASTER_CHANNEL as usize].downconn_bootstrap_decoder_err_read)()
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);
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println!(
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"Trigger ack = {}",
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(CXP[MASTER_CHANNEL as usize].downconn_trigger_ack_read)()
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);
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if (CXP[MASTER_CHANNEL as usize].downconn_trigger_ack_read)() == 1 {
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println!("Trigger ack clear");
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(CXP[MASTER_CHANNEL as usize].downconn_trigger_ack_write)(1);
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};
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}
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cxp_ctrl::print_decode_error(MASTER_CHANNEL);
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if i > 0 {
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print_packetu32(&pak_arr, &k_arr, &err, &eop, i as usize);
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} else {
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println!("No frame data received");
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}
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}
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pub fn print_packetu32(pak: &[u32], k: &[u8], err: &[u8], eop: &[u8], len: usize) {
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use libboard_zynq::println;
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println!("pak = [");
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let mut i_stream_id: usize = len + 1;
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let mut i_pak_tag: usize = len + 1;
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let mut i_size_0: usize = len + 1;
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let mut i_size_1: usize = len + 1;
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for i in 0..len {
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let data: [u8; 4] = pak[i].to_be_bytes();
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// if eop[i] == 1 {
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// if err[i] == 1 {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | eop crc error",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | eop",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// }
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// i_stream_id = i + 1;
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// i_pak_tag = i + 2;
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// i_size_0 = i + 3;
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// i_size_1 = i + 4
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// } else if i == i_stream_id {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | stream id",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else if i == i_pak_tag {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | packet tag",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else if i == i_size_0 {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | DsizeP[15:8]",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else if i == i_size_1 {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | DsizeP[7:0]",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else {
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// if err[i] == 1 {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | crc error",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// } else {
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// println!(
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// "{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} |",
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// i + 1,
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// data[0],
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// data[1],
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// data[2],
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// data[3],
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// k[i],
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// );
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// }
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if err[i] == 1 {
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println!(
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"{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} | crc error",
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i + 1,
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data[0],
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data[1],
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data[2],
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data[3],
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k[i],
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);
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} else {
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println!(
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"{:#03} {:#04X} {:#04X} {:#04X} {:#04X} | K {:04b} |",
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i + 1,
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data[0],
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data[1],
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data[2],
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data[3],
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k[i],
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);
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};
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}
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println!("]");
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println!("============================================");
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}
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@ -11,6 +11,8 @@ use super::{cache,
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core1::rtio_get_destination_status,
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core1::rtio_get_destination_status,
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dma, linalg,
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dma, linalg,
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rpc::{rpc_recv, rpc_send, rpc_send_async}};
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rpc::{rpc_recv, rpc_send, rpc_send_async}};
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#[cfg(has_cxp_phys)]
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use crate::cxp;
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use crate::{eh_artiq, i2c, rtio};
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use crate::{eh_artiq, i2c, rtio};
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extern "C" {
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extern "C" {
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@ -126,6 +128,22 @@ pub fn resolve(required: &[u8]) -> Option<u32> {
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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api!(subkernel_await_message = subkernel::await_message),
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api!(subkernel_await_message = subkernel::await_message),
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// CoaXPress
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#[cfg(has_cxp_phys)]
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api!(cxp_read_words = cxp::cxp_read_words),
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#[cfg(has_cxp_phys)]
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api!(cxp_readu32 = cxp::cxp_readu32),
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#[cfg(has_cxp_phys)]
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api!(cxp_readu64 = cxp::cxp_readu64),
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#[cfg(has_cxp_phys)]
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api!(cxp_writeu32 = cxp::cxp_writeu32),
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#[cfg(has_cxp_phys)]
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api!(cxp_writeu64 = cxp::cxp_writeu64),
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#[cfg(has_cxp_phys)]
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api!(cxp_setup = cxp::cxp_setup),
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#[cfg(has_cxp_phys)]
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api!(cxp_debug_frame_print = cxp::cxp_debug_frame_print),
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// Double-precision floating-point arithmetic helper functions
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// Double-precision floating-point arithmetic helper functions
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// RTABI chapter 4.1.2, Table 2
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// RTABI chapter 4.1.2, Table 2
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api!(__aeabi_dadd),
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api!(__aeabi_dadd),
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@ -35,6 +35,8 @@ pub mod rtio;
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#[path = "../../../build/pl.rs"]
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#[path = "../../../build/pl.rs"]
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pub mod pl;
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pub mod pl;
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#[cfg(has_cxp_phys)]
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pub mod cxp;
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#[derive(Debug, Clone)]
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#[derive(Debug, Clone)]
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pub struct RPCException {
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pub struct RPCException {
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