diff --git a/src/libboard_artiq/src/cxp.rs b/src/libboard_artiq/src/cxp.rs
index e69bfcd..30f2254 100644
--- a/src/libboard_artiq/src/cxp.rs
+++ b/src/libboard_artiq/src/cxp.rs
@@ -5,9 +5,9 @@ use libboard_zynq::timer::GlobalTimer;
 use log::{info, warn};
 
 use crate::{cxp_ctrl::{read_u32, read_u64, reset_tag, send_test_packet, write_bytes_no_ack, write_u32, write_u64},
-            cxp_phys::{self, CXP_CHANNELS, CXP_SPEED},
+            cxp_phys::{change_linerate, CXP_SPEED},
             cxp_proto::Error as ProtoError,
-            pl::csr::CXP};
+            pl::csr::{CXP, CXP_LEN}};
 
 // Bootstrap registers address
 const STANDARD: u32 = 0x0000;
@@ -31,6 +31,7 @@ const VERSION_SUPPORTED: u32 = 0x4044;
 const VERSION_USED: u32 = 0x4048;
 
 // Setup const
+const CXP_CHANNELS: u8 = CXP_LEN as u8;
 // TEST: result
 // Currently, multilane/channel is not working properly in gateware due to buffer overflow issue
 // only single lane @ 0x800 max pak size or dual lane 256 max pak size is working
@@ -110,7 +111,7 @@ fn discover_camera(timer: &mut GlobalTimer) -> Result<(), Error> {
     // 1.25Gbps (CXP_1) and 3.125Gbps (CXP_3) are the discovery rate
     // both linerate need to be checked as camera only support ONE of discovery rates
     for speed in [CXP_SPEED::CXP_1, CXP_SPEED::CXP_3].iter() {
-        cxp_phys::change_linerate(*speed);
+        change_linerate(*speed);
 
         // Section 12.1.2 (CXP-001-2021)
         // send ConnectionReset on all channels -> wait 200ms -> scan for active channels
@@ -281,7 +282,7 @@ fn set_operation_linerate(active_channels: u8, with_tag: bool, timer: &mut Globa
             with_tag,
         )?;
 
-        cxp_phys::change_linerate(speed);
+        change_linerate(speed);
         timer.delay_ms(200);
 
         // check no active channels are down after linerate change