forked from M-Labs/artiq-zynq
cxp downconn: extend comma_det check period
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@ -370,7 +370,7 @@ class QPLL(Module):
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# Warning: Xilinx transceivers are LSB first, and comma needs to be flipped
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# Warning: Xilinx transceivers are LSB first, and comma needs to be flipped
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# compared to the usual 8b10b binary representation.
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# compared to the usual 8b10b binary representation.
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class Comma_Detector(Module):
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class Comma_Detector(Module):
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def __init__(self, comma, check_period=100_000):
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def __init__(self, comma, check_period=150_000):
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self.data = Signal(20)
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self.data = Signal(20)
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self.rxinit_done = Signal()
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self.rxinit_done = Signal()
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