From 6671169a8eac4fa239fdee6e89e318a61a6f0a5e Mon Sep 17 00:00:00 2001
From: morgan <mc@m-labs.hk>
Date: Mon, 21 Oct 2024 16:46:07 +0800
Subject: [PATCH] cxp coredevice driver: init

---
 cxp_kernel.py | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 cxp_kernel.py

diff --git a/cxp_kernel.py b/cxp_kernel.py
new file mode 100644
index 0000000..caee967
--- /dev/null
+++ b/cxp_kernel.py
@@ -0,0 +1,58 @@
+"""
+Non-realtime drivers for CXP.
+"""
+
+# TODO: add api calls for CTRL packet similar i2c
+# TODO: add timing critical trigger ack
+
+
+from artiq.language.core import syscall, kernel
+from artiq.language.types import TBool, TInt32, TNone
+from artiq.coredevice.rtio import rtio_output
+from artiq.experiment import *
+
+
+class CoaXPress:
+    def __init__(self, channel, core_device="core"):
+        # __device_mgr is private 
+        # self.core = dmgr.get(core_device)
+
+        # you can get the channel via `print(len(rtio_channels))` before calling
+        # `rtio_channels.append(rtio.Channel.from_phy(cxp_interface))`
+        self.channel = channel
+        # the first 8 bits is reserved for the rtlink.OInterface.addr not for channel no.
+        self.target_o = channel << 8
+
+    @staticmethod
+    def get_rtio_channels(channel, **kwargs):
+        return [(channel, None)]
+
+    @kernel
+    def trigger(self, linktrig, trigdelay):
+        rtio_output(self.target_o, linktrig | trigdelay << 1)
+
+
+@syscall(flags={"nounwind", "nowrite"})
+def cxp_readu32(channel: TInt32, addr: TInt32) -> TNone:
+    raise NotImplementedError("syscall not simulated")
+
+@syscall(flags={"nounwind", "nowrite"})
+def cxp_writeu32(channel: TInt32, addr: TInt32, val: TInt32) -> TNone:
+    raise NotImplementedError("syscall not simulated")
+
+
+
+class IdleKernel(EnvExperiment):
+    def build(self):
+        self.setattr_device("core")
+        self.setattr_device("led0")
+
+        # declare the class before using it in kernel
+        self.cxp = CoaXPress(0x0)
+
+    @kernel
+    def run(self):
+        self.core.reset()
+        # cxp_readu32(0, 3)
+        # cxp_writeu32(0, 0, 0xABCD)
+        self.cxp.trigger(1, 10)