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upconn fw: add event ack packet

This commit is contained in:
morgan 2024-09-11 12:48:06 +08:00
parent aeabca2182
commit 5c253fefb6
1 changed files with 34 additions and 16 deletions
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50
src/libboard_artiq/src/cxp_upconn.rs
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@ -30,7 +30,9 @@ pub fn tx_test(timer: &mut GlobalTimer) {
// csr::cxp::upconn_bitrate2x_enable_write(1); // csr::cxp::upconn_bitrate2x_enable_write(1);
csr::cxp::upconn_clk_reset_write(0); csr::cxp::upconn_clk_reset_write(0);
read_u32(0x00).expect("Cannot Write CoaXpress Register"); // read_u32(0x00).expect("Cannot Write CoaXpress Register");
send(&Packet::EventAck { packet_tag: 0x04 });
loop {}
// csr::cxp::upconn_tx_testmode_en_write(1); // csr::cxp::upconn_tx_testmode_en_write(1);
@ -87,11 +89,13 @@ pub enum Packet {
length: u8, length: u8,
data: [u8; DATA_MAXSIZE], data: [u8; DATA_MAXSIZE],
}, // max register size is 8 bytes }, // max register size is 8 bytes
EventAck {
packet_tag: u8,
},
} }
impl Packet { impl Packet {
pub fn write_to<W>(&self, writer: &mut W) -> Result<(), Error> pub fn write_to(&self, writer: &mut Cursor<&mut [u8]>) -> Result<(), Error> {
where W: Write {
// CoaXpress use big endian // CoaXpress use big endian
match *self { match *self {
Packet::CtrlRead { addr, length } => { Packet::CtrlRead { addr, length } => {
@ -123,6 +127,24 @@ impl Packet {
writer.write(&addr.to_be_bytes())?; writer.write(&addr.to_be_bytes())?;
writer.write(&data[0..length as usize])?; writer.write(&data[0..length as usize])?;
} }
Packet::EventAck { packet_tag } => {
writer.write(&[0x08; 4])?;
writer.write(&[packet_tag; 4])?;
}
}
// Section 9.2.2.2 (CXP-001-2021)
// Only Control packet need CRC32 appended in the end of the packet
// CoaXpress use the polynomial of IEEE-802.3 (Ethernet) CRC but the checksum calculation is different
// Also, the calculation does not include the first 4 bytes of packet_type
match *self {
Packet::CtrlRead { .. }
| Packet::CtrlWrite { .. }
| Packet::CtrlReadWithTag { .. }
| Packet::CtrlWriteWithTag { .. } => {
let checksum = crc32::checksum_ieee(&writer.get_ref()[4..writer.position()]);
writer.write(&(!checksum).to_le_bytes())?;
}
_ => {}
} }
Ok(()) Ok(())
} }
@ -139,20 +161,16 @@ pub fn send(packet: &Packet) -> Result<(), Error> {
packet.write_to(&mut writer)?; packet.write_to(&mut writer)?;
// Section 9.2.2.2 (CXP-001-2021) print_packet(&buffer);
// CoaXpress use the polynomial of IEEE-802.3 (Ethernet) CRC but the checksum calculation is different
// Also, the calculation does not include the first 4 bytes of packet_type
let checksum = crc32::checksum_ieee(&writer.get_ref()[4..writer.position()]);
writer.write(&(!checksum).to_le_bytes())?;
unsafe { // unsafe {
let len = writer.position(); // let len = writer.position();
csr::cxp::upconn_command_len_write(len as u8); // csr::cxp::upconn_command_len_write(len as u8);
for data in writer.get_ref()[..len].iter() { // for data in writer.get_ref()[..len].iter() {
while csr::cxp::upconn_command_writeable_read() == 0 {} // while csr::cxp::upconn_command_writeable_read() == 0 {}
csr::cxp::upconn_command_data_write(*data); // csr::cxp::upconn_command_data_write(*data);
} // }
} // }
Ok(()) Ok(())
} }