From 5c253fefb642b778156fcacb9a48af5e93ddd31c Mon Sep 17 00:00:00 2001
From: morgan <mc@m-labs.hk>
Date: Wed, 11 Sep 2024 12:48:06 +0800
Subject: [PATCH] upconn fw: add event ack packet

---
 src/libboard_artiq/src/cxp_upconn.rs | 50 +++++++++++++++++++---------
 1 file changed, 34 insertions(+), 16 deletions(-)

diff --git a/src/libboard_artiq/src/cxp_upconn.rs b/src/libboard_artiq/src/cxp_upconn.rs
index fb931ee..7f65e76 100644
--- a/src/libboard_artiq/src/cxp_upconn.rs
+++ b/src/libboard_artiq/src/cxp_upconn.rs
@@ -30,7 +30,9 @@ pub fn tx_test(timer: &mut GlobalTimer) {
         // csr::cxp::upconn_bitrate2x_enable_write(1);
         csr::cxp::upconn_clk_reset_write(0);
 
-        read_u32(0x00).expect("Cannot Write CoaXpress Register");
+        // read_u32(0x00).expect("Cannot Write CoaXpress Register");
+        send(&Packet::EventAck { packet_tag: 0x04 });
+        loop {}
 
         // csr::cxp::upconn_tx_testmode_en_write(1);
 
@@ -87,11 +89,13 @@ pub enum Packet {
         length: u8,
         data: [u8; DATA_MAXSIZE],
     }, // max register size is 8 bytes
+    EventAck {
+        packet_tag: u8,
+    },
 }
 
 impl Packet {
-    pub fn write_to<W>(&self, writer: &mut W) -> Result<(), Error>
-    where W: Write {
+    pub fn write_to(&self, writer: &mut Cursor<&mut [u8]>) -> Result<(), Error> {
         // CoaXpress use big endian
         match *self {
             Packet::CtrlRead { addr, length } => {
@@ -123,6 +127,24 @@ impl Packet {
                 writer.write(&addr.to_be_bytes())?;
                 writer.write(&data[0..length as usize])?;
             }
+            Packet::EventAck { packet_tag } => {
+                writer.write(&[0x08; 4])?;
+                writer.write(&[packet_tag; 4])?;
+            }
+        }
+        // Section 9.2.2.2 (CXP-001-2021)
+        // Only Control packet need CRC32 appended in the end of the packet
+        // CoaXpress use the polynomial of IEEE-802.3 (Ethernet) CRC but the checksum calculation is different
+        // Also, the calculation does not include the first 4 bytes of packet_type
+        match *self {
+            Packet::CtrlRead { .. }
+            | Packet::CtrlWrite { .. }
+            | Packet::CtrlReadWithTag { .. }
+            | Packet::CtrlWriteWithTag { .. } => {
+                let checksum = crc32::checksum_ieee(&writer.get_ref()[4..writer.position()]);
+                writer.write(&(!checksum).to_le_bytes())?;
+            }
+            _ => {}
         }
         Ok(())
     }
@@ -139,20 +161,16 @@ pub fn send(packet: &Packet) -> Result<(), Error> {
 
     packet.write_to(&mut writer)?;
 
-    // Section 9.2.2.2 (CXP-001-2021)
-    // CoaXpress use the polynomial of IEEE-802.3 (Ethernet) CRC but the checksum calculation is different
-    // Also, the calculation does not include the first 4 bytes of packet_type
-    let checksum = crc32::checksum_ieee(&writer.get_ref()[4..writer.position()]);
-    writer.write(&(!checksum).to_le_bytes())?;
+    print_packet(&buffer);
 
-    unsafe {
-        let len = writer.position();
-        csr::cxp::upconn_command_len_write(len as u8);
-        for data in writer.get_ref()[..len].iter() {
-            while csr::cxp::upconn_command_writeable_read() == 0 {}
-            csr::cxp::upconn_command_data_write(*data);
-        }
-    }
+    // unsafe {
+    //     let len = writer.position();
+    //     csr::cxp::upconn_command_len_write(len as u8);
+    //     for data in writer.get_ref()[..len].iter() {
+    //         while csr::cxp::upconn_command_writeable_read() == 0 {}
+    //         csr::cxp::upconn_command_data_write(*data);
+    //     }
+    // }
 
     Ok(())
 }