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artiq-zynq
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cxp downconn fw: update csr function name

This commit is contained in:
morgan 2024-07-26 17:36:29 +08:00
parent 1f0154d5b2
commit 57d6e9a669
1 changed files with 24 additions and 24 deletions
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48
src/libboard_artiq/src/cxp_downconn.rs
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@ -7,7 +7,7 @@ use crate::pl::csr;
pub fn main(timer: &mut GlobalTimer) {
unsafe {
info!("turning on pmc loopback mode...");
csr::cxp::loopback_mode_write(0b010); // Near-End PMA Loopback
csr::cxp::downconn_loopback_mode_write(0b010); // Near-End PMA Loopback
loopback_testing(timer, 0x00, 0);
}
@ -36,29 +36,29 @@ pub fn main(timer: &mut GlobalTimer) {
[1, 1, 1, 0],
];
csr::cxp::data_0_write(DATA[0][0]);
csr::cxp::data_1_write(DATA[0][1]);
csr::cxp::data_2_write(DATA[0][2]);
csr::cxp::data_3_write(DATA[0][3]);
csr::cxp::downconn_data_0_write(DATA[0][0]);
csr::cxp::downconn_data_1_write(DATA[0][1]);
csr::cxp::downconn_data_2_write(DATA[0][2]);
csr::cxp::downconn_data_3_write(DATA[0][3]);
csr::cxp::control_bit_0_write(DATA[1][0]);
csr::cxp::control_bit_1_write(DATA[1][1]);
csr::cxp::control_bit_2_write(DATA[1][2]);
csr::cxp::control_bit_3_write(DATA[1][3]);
csr::cxp::downconn_control_bit_0_write(DATA[1][0]);
csr::cxp::downconn_control_bit_1_write(DATA[1][1]);
csr::cxp::downconn_control_bit_2_write(DATA[1][2]);
csr::cxp::downconn_control_bit_3_write(DATA[1][3]);
// enable cxp gtx clock domains
csr::cxp::tx_start_init_write(1);
csr::cxp::rx_start_init_write(1);
csr::cxp::downconn_tx_start_init_write(1);
csr::cxp::downconn_rx_start_init_write(1);
info!("waiting for QPLL/CPLL to lock...");
timer.delay_us(50_000);
info!("tx_phaligndone = {} ", csr::cxp::txinit_phaligndone_read(),);
info!("tx_phaligndone = {} ", csr::cxp::downconn_txinit_phaligndone_read(),);
// enable txdata tranmission thought MGTXTXP, required by PMA loopback
csr::cxp::txenable_write(1);
csr::cxp::downconn_txenable_write(1);
info!("waiting for rx to align...");
while csr::cxp::rx_ready_read() != 1 {}
while csr::cxp::downconn_rx_ready_read() != 1 {}
timer.delay_us(50_000);
info!("rx ready!");
@ -66,15 +66,15 @@ pub fn main(timer: &mut GlobalTimer) {
// csr::cxp::control_bit_3_write(control_bit);
println!(
"data[0] = {:#04x} control bit = {:#b} encoded = {:#012b}",
csr::cxp::data_0_read(),
csr::cxp::control_bit_0_read(),
csr::cxp::encoded_0_read(),
csr::cxp::downconn_data_0_read(),
csr::cxp::downconn_control_bit_0_read(),
csr::cxp::downconn_encoded_0_read(),
);
println!(
"data[1] = {:#04x} control bit = {:#b} encoded = {:#012b}",
csr::cxp::data_1_read(),
csr::cxp::control_bit_1_read(),
csr::cxp::encoded_1_read(),
csr::cxp::downconn_data_1_read(),
csr::cxp::downconn_control_bit_1_read(),
csr::cxp::downconn_encoded_1_read(),
);
for _ in 0..20 {
@ -86,10 +86,10 @@ pub fn main(timer: &mut GlobalTimer) {
// );
println!(
"decoded_data[0] = {:#04x} decoded_k[0] = {:#b} decoded_data[1] = {:#04x} decoded_k[1] = {:#b}",
csr::cxp::decoded_data_0_read(),
csr::cxp::decoded_k_0_read(),
csr::cxp::decoded_data_1_read(),
csr::cxp::decoded_k_1_read(),
csr::cxp::downconn_decoded_data_0_read(),
csr::cxp::downconn_decoded_k_0_read(),
csr::cxp::downconn_decoded_data_1_read(),
csr::cxp::downconn_decoded_k_1_read(),
);
}
}